📄 neofb.c
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/* * linux/drivers/video/neofb.c -- NeoMagic Framebuffer Driver * * Copyright (c) 2001-2002 Denis Oliver Kropp <dok@directfb.org> * * * Card specific code is based on XFree86's neomagic driver. * Framebuffer framework code is based on code of cyber2000fb. * * This file is subject to the terms and conditions of the GNU General * Public License. See the file COPYING in the main directory of this * archive for more details. * * * 0.4.1 * - Cosmetic changes (dok) * * 0.4 * - Toshiba Libretto support, allow modes larger than LCD size if * LCD is disabled, keep BIOS settings if internal/external display * haven't been enabled explicitly * (Thomas J. Moore <dark@mama.indstate.edu>) * * 0.3.3 * - Porting over to new fbdev api. (jsimmons) * * 0.3.2 * - got rid of all floating point (dok) * * 0.3.1 * - added module license (dok) * * 0.3 * - hardware accelerated clear and move for 2200 and above (dok) * - maximum allowed dotclock is handled now (dok) * * 0.2.1 * - correct panning after X usage (dok) * - added module and kernel parameters (dok) * - no stretching if external display is enabled (dok) * * 0.2 * - initial version (dok) * * * TODO * - ioctl for internal/external switching * - blanking * - 32bit depth support, maybe impossible * - disable pan-on-sync, need specs * * BUGS * - white margin on bootup like with tdfxfb (colormap problem?) * */#include <linux/module.h>#include <linux/kernel.h>#include <linux/errno.h>#include <linux/string.h>#include <linux/mm.h>#include <linux/slab.h>#include <linux/delay.h>#include <linux/fb.h>#include <linux/pci.h>#include <linux/init.h>#ifdef CONFIG_TOSHIBA#include <linux/toshiba.h>#endif#include <asm/io.h>#include <asm/irq.h>#include <asm/pgtable.h>#include <asm/system.h>#ifdef CONFIG_MTRR#include <asm/mtrr.h>#endif#include <video/vga.h>#include <video/neomagic.h>#define NEOFB_VERSION "0.4.2"/* --------------------------------------------------------------------- */static int internal;static int external;static int libretto;static int nostretch;static int nopciburst;static char *mode_option __devinitdata = NULL;#ifdef MODULEMODULE_AUTHOR("(c) 2001-2002 Denis Oliver Kropp <dok@convergence.de>");MODULE_LICENSE("GPL");MODULE_DESCRIPTION("FBDev driver for NeoMagic PCI Chips");module_param(internal, bool, 0);MODULE_PARM_DESC(internal, "Enable output on internal LCD Display.");module_param(external, bool, 0);MODULE_PARM_DESC(external, "Enable output on external CRT.");module_param(libretto, bool, 0);MODULE_PARM_DESC(libretto, "Force Libretto 100/110 800x480 LCD.");module_param(nostretch, bool, 0);MODULE_PARM_DESC(nostretch, "Disable stretching of modes smaller than LCD.");module_param(nopciburst, bool, 0);MODULE_PARM_DESC(nopciburst, "Disable PCI burst mode.");module_param(mode_option, charp, 0);MODULE_PARM_DESC(mode_option, "Preferred video mode ('640x480-8@60', etc)");#endif/* --------------------------------------------------------------------- */static biosMode bios8[] = { {320, 240, 0x40}, {300, 400, 0x42}, {640, 400, 0x20}, {640, 480, 0x21}, {800, 600, 0x23}, {1024, 768, 0x25},};static biosMode bios16[] = { {320, 200, 0x2e}, {320, 240, 0x41}, {300, 400, 0x43}, {640, 480, 0x31}, {800, 600, 0x34}, {1024, 768, 0x37},};static biosMode bios24[] = { {640, 480, 0x32}, {800, 600, 0x35}, {1024, 768, 0x38}};#ifdef NO_32BIT_SUPPORT_YET/* FIXME: guessed values, wrong */static biosMode bios32[] = { {640, 480, 0x33}, {800, 600, 0x36}, {1024, 768, 0x39}};#endifstatic inline void write_le32(int regindex, u32 val, const struct neofb_par *par){ writel(val, par->neo2200 + par->cursorOff + regindex);}static int neoFindMode(int xres, int yres, int depth){ int xres_s; int i, size; biosMode *mode; switch (depth) { case 8: size = ARRAY_SIZE(bios8); mode = bios8; break; case 16: size = ARRAY_SIZE(bios16); mode = bios16; break; case 24: size = ARRAY_SIZE(bios24); mode = bios24; break;#ifdef NO_32BIT_SUPPORT_YET case 32: size = ARRAY_SIZE(bios32); mode = bios32; break;#endif default: return 0; } for (i = 0; i < size; i++) { if (xres <= mode[i].x_res) { xres_s = mode[i].x_res; for (; i < size; i++) { if (mode[i].x_res != xres_s) return mode[i - 1].mode; if (yres <= mode[i].y_res) return mode[i].mode; } } } return mode[size - 1].mode;}/* * neoCalcVCLK -- * * Determine the closest clock frequency to the one requested. */#define MAX_N 127#define MAX_D 31#define MAX_F 1static void neoCalcVCLK(const struct fb_info *info, struct neofb_par *par, long freq){ int n, d, f; int n_best = 0, d_best = 0, f_best = 0; long f_best_diff = 0x7ffff; for (f = 0; f <= MAX_F; f++) for (d = 0; d <= MAX_D; d++) for (n = 0; n <= MAX_N; n++) { long f_out; long f_diff; f_out = ((14318 * (n + 1)) / (d + 1)) >> f; f_diff = abs(f_out - freq); if (f_diff <= f_best_diff) { f_best_diff = f_diff; n_best = n; d_best = d; f_best = f; } if (f_out > freq) break; } if (info->fix.accel == FB_ACCEL_NEOMAGIC_NM2200 || info->fix.accel == FB_ACCEL_NEOMAGIC_NM2230 || info->fix.accel == FB_ACCEL_NEOMAGIC_NM2360 || info->fix.accel == FB_ACCEL_NEOMAGIC_NM2380) { /* NOT_DONE: We are trying the full range of the 2200 clock. We should be able to try n up to 2047 */ par->VCLK3NumeratorLow = n_best; par->VCLK3NumeratorHigh = (f_best << 7); } else par->VCLK3NumeratorLow = n_best | (f_best << 7); par->VCLK3Denominator = d_best;#ifdef NEOFB_DEBUG printk(KERN_DEBUG "neoVCLK: f:%ld NumLow=%d NumHi=%d Den=%d Df=%ld\n", freq, par->VCLK3NumeratorLow, par->VCLK3NumeratorHigh, par->VCLK3Denominator, f_best_diff);#endif}/* * vgaHWInit -- * Handle the initialization, etc. of a screen. * Return FALSE on failure. */static int vgaHWInit(const struct fb_var_screeninfo *var, struct neofb_par *par){ int hsync_end = var->xres + var->right_margin + var->hsync_len; int htotal = (hsync_end + var->left_margin) >> 3; int vsync_start = var->yres + var->lower_margin; int vsync_end = vsync_start + var->vsync_len; int vtotal = vsync_end + var->upper_margin; par->MiscOutReg = 0x23; if (!(var->sync & FB_SYNC_HOR_HIGH_ACT)) par->MiscOutReg |= 0x40; if (!(var->sync & FB_SYNC_VERT_HIGH_ACT)) par->MiscOutReg |= 0x80; /* * Time Sequencer */ par->Sequencer[0] = 0x00; par->Sequencer[1] = 0x01; par->Sequencer[2] = 0x0F; par->Sequencer[3] = 0x00; /* Font select */ par->Sequencer[4] = 0x0E; /* Misc */ /* * CRTC Controller */ par->CRTC[0] = htotal - 5; par->CRTC[1] = (var->xres >> 3) - 1; par->CRTC[2] = (var->xres >> 3) - 1; par->CRTC[3] = ((htotal - 1) & 0x1F) | 0x80; par->CRTC[4] = ((var->xres + var->right_margin) >> 3); par->CRTC[5] = (((htotal - 1) & 0x20) << 2) | (((hsync_end >> 3)) & 0x1F); par->CRTC[6] = (vtotal - 2) & 0xFF; par->CRTC[7] = (((vtotal - 2) & 0x100) >> 8) | (((var->yres - 1) & 0x100) >> 7) | ((vsync_start & 0x100) >> 6) | (((var->yres - 1) & 0x100) >> 5) | 0x10 | (((vtotal - 2) & 0x200) >> 4) | (((var->yres - 1) & 0x200) >> 3) | ((vsync_start & 0x200) >> 2); par->CRTC[8] = 0x00; par->CRTC[9] = (((var->yres - 1) & 0x200) >> 4) | 0x40; if (var->vmode & FB_VMODE_DOUBLE) par->CRTC[9] |= 0x80; par->CRTC[10] = 0x00; par->CRTC[11] = 0x00; par->CRTC[12] = 0x00; par->CRTC[13] = 0x00; par->CRTC[14] = 0x00; par->CRTC[15] = 0x00; par->CRTC[16] = vsync_start & 0xFF; par->CRTC[17] = (vsync_end & 0x0F) | 0x20; par->CRTC[18] = (var->yres - 1) & 0xFF; par->CRTC[19] = var->xres_virtual >> 4; par->CRTC[20] = 0x00; par->CRTC[21] = (var->yres - 1) & 0xFF; par->CRTC[22] = (vtotal - 1) & 0xFF; par->CRTC[23] = 0xC3; par->CRTC[24] = 0xFF; /* * are these unnecessary? * vgaHWHBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO); * vgaHWVBlankKGA(mode, regp, 0, KGA_FIX_OVERSCAN | KGA_ENABLE_ON_ZERO); */ /* * Graphics Display Controller */ par->Graphics[0] = 0x00; par->Graphics[1] = 0x00; par->Graphics[2] = 0x00; par->Graphics[3] = 0x00; par->Graphics[4] = 0x00; par->Graphics[5] = 0x40; par->Graphics[6] = 0x05; /* only map 64k VGA memory !!!! */ par->Graphics[7] = 0x0F; par->Graphics[8] = 0xFF; par->Attribute[0] = 0x00; /* standard colormap translation */ par->Attribute[1] = 0x01; par->Attribute[2] = 0x02; par->Attribute[3] = 0x03; par->Attribute[4] = 0x04; par->Attribute[5] = 0x05; par->Attribute[6] = 0x06; par->Attribute[7] = 0x07; par->Attribute[8] = 0x08; par->Attribute[9] = 0x09; par->Attribute[10] = 0x0A; par->Attribute[11] = 0x0B; par->Attribute[12] = 0x0C; par->Attribute[13] = 0x0D; par->Attribute[14] = 0x0E; par->Attribute[15] = 0x0F; par->Attribute[16] = 0x41; par->Attribute[17] = 0xFF; par->Attribute[18] = 0x0F; par->Attribute[19] = 0x00; par->Attribute[20] = 0x00; return 0;}static void vgaHWLock(struct vgastate *state){ /* Protect CRTC[0-7] */ vga_wcrt(state->vgabase, 0x11, vga_rcrt(state->vgabase, 0x11) | 0x80);}static void vgaHWUnlock(void){ /* Unprotect CRTC[0-7] */ vga_wcrt(NULL, 0x11, vga_rcrt(NULL, 0x11) & ~0x80);}static void neoLock(struct vgastate *state){ vga_wgfx(state->vgabase, 0x09, 0x00); vgaHWLock(state);}static void neoUnlock(void){ vgaHWUnlock(); vga_wgfx(NULL, 0x09, 0x26);}/* * VGA Palette management */static int paletteEnabled = 0;static inline void VGAenablePalette(void){ vga_r(NULL, VGA_IS1_RC); vga_w(NULL, VGA_ATT_W, 0x00); paletteEnabled = 1;}static inline void VGAdisablePalette(void){ vga_r(NULL, VGA_IS1_RC); vga_w(NULL, VGA_ATT_W, 0x20); paletteEnabled = 0;}static inline void VGAwATTR(u8 index, u8 value){ if (paletteEnabled) index &= ~0x20; else index |= 0x20; vga_r(NULL, VGA_IS1_RC); vga_wattr(NULL, index, value);}static void vgaHWProtect(int on){ unsigned char tmp; tmp = vga_rseq(NULL, 0x01); if (on) { /* * Turn off screen and disable sequencer. */ vga_wseq(NULL, 0x00, 0x01); /* Synchronous Reset */ vga_wseq(NULL, 0x01, tmp | 0x20); /* disable the display */ VGAenablePalette(); } else { /* * Reenable sequencer, then turn on screen. */ vga_wseq(NULL, 0x01, tmp & ~0x20); /* reenable display */ vga_wseq(NULL, 0x00, 0x03); /* clear synchronousreset */ VGAdisablePalette(); }}static void vgaHWRestore(const struct fb_info *info, const struct neofb_par *par){ int i; vga_w(NULL, VGA_MIS_W, par->MiscOutReg); for (i = 1; i < 5; i++) vga_wseq(NULL, i, par->Sequencer[i]); /* Ensure CRTC registers 0-7 are unlocked by clearing bit 7 or CRTC[17] */ vga_wcrt(NULL, 17, par->CRTC[17] & ~0x80); for (i = 0; i < 25; i++) vga_wcrt(NULL, i, par->CRTC[i]); for (i = 0; i < 9; i++) vga_wgfx(NULL, i, par->Graphics[i]); VGAenablePalette(); for (i = 0; i < 21; i++) VGAwATTR(i, par->Attribute[i]); VGAdisablePalette();}/* -------------------- Hardware specific routines ------------------------- *//* * Hardware Acceleration for Neo2200+ */static inline int neo2200_sync(struct fb_info *info){ struct neofb_par *par = info->par; while (readl(&par->neo2200->bltStat) & 1) cpu_relax(); return 0;}static inline void neo2200_wait_fifo(struct fb_info *info, int requested_fifo_space){ // ndev->neo.waitfifo_calls++; // ndev->neo.waitfifo_sum += requested_fifo_space; /* FIXME: does not work if (neo_fifo_space < requested_fifo_space) { neo_fifo_waitcycles++; while (1) { neo_fifo_space = (neo2200->bltStat >> 8); if (neo_fifo_space >= requested_fifo_space) break; } } else { neo_fifo_cache_hits++; } neo_fifo_space -= requested_fifo_space; */ neo2200_sync(info);}static inline void neo2200_accel_init(struct fb_info *info, struct fb_var_screeninfo *var){ struct neofb_par *par = info->par; Neo2200 __iomem *neo2200 = par->neo2200; u32 bltMod, pitch; neo2200_sync(info); switch (var->bits_per_pixel) { case 8: bltMod = NEO_MODE1_DEPTH8; pitch = var->xres_virtual; break; case 15: case 16: bltMod = NEO_MODE1_DEPTH16; pitch = var->xres_virtual * 2; break; case 24: bltMod = NEO_MODE1_DEPTH24; pitch = var->xres_virtual * 3; break; default: printk(KERN_ERR "neofb: neo2200_accel_init: unexpected bits per pixel!\n"); return; } writel(bltMod << 16, &neo2200->bltStat); writel((pitch << 16) | pitch, &neo2200->pitch);}/* --------------------------------------------------------------------- */static intneofb_open(struct fb_info *info, int user){ struct neofb_par *par = info->par; if (!par->ref_count) { memset(&par->state, 0, sizeof(struct vgastate)); par->state.flags = VGA_SAVE_MODE | VGA_SAVE_FONTS; save_vga(&par->state); }
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