cyber2000fb.h

Linux环境下视频显示卡设备的驱动程序源代码

#define EXT_Y_START		0xc9		/* ext->screen, 16 bits			*/
#define EXT_Y_END		0xcb		/* ext->screen, 16 bits			*/
#define EXT_SRC_WIN_WIDTH	0xcd		/* 8 bits				*/
#define EXT_COLOUR_COMPARE	0xce		/* 24 bits				*/
#define EXT_DDA_X_INIT		0xd1		/* ext->screen 16 bits			*/
#define EXT_DDA_X_INC		0xd3		/* ext->screen 16 bits			*/
#define EXT_DDA_Y_INIT		0xd5		/* ext->screen 16 bits			*/
#define EXT_DDA_Y_INC		0xd7		/* ext->screen 16 bits			*/

#define EXT_VID_FIFO_CTL	0xd9

#define EXT_VID_FMT		0xdb
#define EXT_VID_FMT_YUV422		0x00	/* formats - does this cause conversion? */
#define EXT_VID_FMT_RGB555		0x01
#define EXT_VID_FMT_RGB565		0x02
#define EXT_VID_FMT_RGB888_24		0x03
#define EXT_VID_FMT_RGB888_32		0x04
#define EXT_VID_FMT_RGB8		0x05
#define EXT_VID_FMT_RGB4444		0x06
#define EXT_VID_FMT_RGB8T		0x07
#define EXT_VID_FMT_DUP_PIX_ZOON	0x08	/* duplicate pixel zoom			*/
#define EXT_VID_FMT_MOD_3RD_PIX		0x20	/* modify 3rd duplicated pixel		*/
#define EXT_VID_FMT_DBL_H_PIX		0x40	/* double horiz pixels			*/
#define EXT_VID_FMT_YUV128		0x80	/* YUV data offset by 128		*/

#define EXT_VID_DISP_CTL1	0xdc
#define EXT_VID_DISP_CTL1_INTRAM	0x01	/* video pixels go to internal RAM	*/
#define EXT_VID_DISP_CTL1_IGNORE_CCOMP	0x02	/* ignore colour compare registers	*/
#define EXT_VID_DISP_CTL1_NOCLIP	0x04	/* do not clip to 16235,16240		*/
#define EXT_VID_DISP_CTL1_UV_AVG	0x08	/* U/V data is averaged			*/
#define EXT_VID_DISP_CTL1_Y128		0x10	/* Y data offset by 128 (if YUV128 set)	*/
#define EXT_VID_DISP_CTL1_VINTERPOL_OFF	0x20	/* disable vertical interpolation	*/
#define EXT_VID_DISP_CTL1_FULL_WIN	0x40	/* video out window full		*/
#define EXT_VID_DISP_CTL1_ENABLE_WINDOW	0x80	/* enable video window			*/

#define EXT_VID_FIFO_CTL1	0xdd
#define EXT_VID_FIFO_CTL1_OE_HIGH	0x02
#define EXT_VID_FIFO_CTL1_INTERLEAVE	0x04	/* enable interleaved memory read	*/

#define EXT_ROM_UCB4GH		0xe5
#define EXT_ROM_UCB4GH_FREEZE		0x02	/* capture frozen			*/
#define EXT_ROM_UCB4GH_ODDFRAME		0x04	/* 1 = odd frame captured		*/
#define EXT_ROM_UCB4GH_1HL		0x08	/* first horizonal line after VGT falling edge */
#define EXT_ROM_UCB4GH_ODD		0x10	/* odd frame indicator			*/
#define EXT_ROM_UCB4GH_INTSTAT		0x20	/* video interrupt			*/

#define VFAC_CTL1		0xe8
#define VFAC_CTL1_CAPTURE		0x01	/* capture enable (only when VSYNC high)*/
#define VFAC_CTL1_VFAC_ENABLE		0x02	/* vfac enable				*/
#define VFAC_CTL1_FREEZE_CAPTURE	0x04	/* freeze capture			*/
#define VFAC_CTL1_FREEZE_CAPTURE_SYNC	0x08	/* sync freeze capture			*/
#define VFAC_CTL1_VALIDFRAME_SRC	0x10	/* select valid frame source		*/
#define VFAC_CTL1_PHILIPS		0x40	/* select Philips mode			*/
#define VFAC_CTL1_MODVINTERPOLCLK	0x80	/* modify vertical interpolation clocl	*/

#define VFAC_CTL2		0xe9
#define VFAC_CTL2_INVERT_VIDDATAVALID	0x01	/* invert video data valid		*/
#define VFAC_CTL2_INVERT_GRAPHREADY	0x02	/* invert graphic ready output sig	*/
#define VFAC_CTL2_INVERT_DATACLK	0x04	/* invert data clock signal		*/
#define VFAC_CTL2_INVERT_HSYNC		0x08	/* invert hsync input			*/
#define VFAC_CTL2_INVERT_VSYNC		0x10	/* invert vsync input			*/
#define VFAC_CTL2_INVERT_FRAME		0x20	/* invert frame odd/even input		*/
#define VFAC_CTL2_INVERT_BLANK		0x40	/* invert blank output			*/
#define VFAC_CTL2_INVERT_OVSYNC		0x80	/* invert other vsync input		*/

#define VFAC_CTL3		0xea
#define VFAC_CTL3_CAP_LARGE_FIFO	0x01	/* large capture fifo			*/
#define VFAC_CTL3_CAP_INTERLACE		0x02	/* capture odd and even fields		*/
#define VFAC_CTL3_CAP_HOLD_4NS		0x00	/* hold capture data for 4ns		*/
#define VFAC_CTL3_CAP_HOLD_2NS		0x04	/* hold capture data for 2ns		*/
#define VFAC_CTL3_CAP_HOLD_6NS		0x08	/* hold capture data for 6ns		*/
#define VFAC_CTL3_CAP_HOLD_0NS		0x0c	/* hold capture data for 0ns		*/
#define VFAC_CTL3_CHROMAKEY		0x20	/* capture data will be chromakeyed	*/
#define VFAC_CTL3_CAP_IRQ		0x40	/* enable capture interrupt		*/

#define CAP_MEM_START		0xeb		/* 18 bits				*/
#define CAP_MAP_WIDTH		0xed		/* high 6 bits				*/
#define CAP_PITCH		0xee		/* 8 bits				*/

#define CAP_CTL_MISC		0xef
#define CAP_CTL_MISC_HDIV		0x01
#define CAP_CTL_MISC_HDIV4		0x02
#define CAP_CTL_MISC_ODDEVEN		0x04
#define CAP_CTL_MISC_HSYNCDIV2		0x08
#define CAP_CTL_MISC_SYNCTZHIGH		0x10
#define CAP_CTL_MISC_SYNCTZOR		0x20
#define CAP_CTL_MISC_DISPUSED		0x80

#define REG_BANK		0xfa
#define REG_BANK_X			0x00
#define REG_BANK_Y			0x01
#define REG_BANK_W			0x02
#define REG_BANK_T			0x03
#define REG_BANK_J			0x04
#define REG_BANK_K			0x05

/*
 * Bus-master
 */
#define BM_VID_ADDR_LOW		0xbc040
#define BM_VID_ADDR_HIGH	0xbc044
#define BM_ADDRESS_LOW		0xbc080
#define BM_ADDRESS_HIGH		0xbc084
#define BM_LENGTH		0xbc088
#define BM_CONTROL		0xbc08c
#define BM_CONTROL_ENABLE		0x01	/* enable transfer			*/
#define BM_CONTROL_IRQEN		0x02	/* enable IRQ at end of transfer	*/
#define BM_CONTROL_INIT			0x04	/* initialise status & count		*/
#define BM_COUNT		0xbc090		/* read-only				*/

/*
 * TV registers
 */
#define TV_VBLANK_EVEN_START	0xbe43c
#define TV_VBLANK_EVEN_END	0xbe440
#define TV_VBLANK_ODD_START	0xbe444
#define TV_VBLANK_ODD_END	0xbe448
#define TV_SYNC_YGAIN		0xbe44c
#define TV_UV_GAIN		0xbe450
#define TV_PED_UVDET		0xbe454
#define TV_UV_BURST_AMP		0xbe458
#define TV_HSYNC_START		0xbe45c
#define TV_HSYNC_END		0xbe460
#define TV_Y_DELAY1		0xbe464
#define TV_Y_DELAY2		0xbe468
#define TV_UV_DELAY1		0xbe46c
#define TV_BURST_START		0xbe470
#define TV_BURST_END		0xbe474
#define TV_HBLANK_START		0xbe478
#define TV_HBLANK_END		0xbe47c
#define TV_PED_EVEN_START	0xbe480
#define TV_PED_EVEN_END		0xbe484
#define TV_PED_ODD_START	0xbe488
#define TV_PED_ODD_END		0xbe48c
#define TV_VSYNC_EVEN_START	0xbe490
#define TV_VSYNC_EVEN_END	0xbe494
#define TV_VSYNC_ODD_START	0xbe498
#define TV_VSYNC_ODD_END	0xbe49c
#define TV_SCFL			0xbe4a0
#define TV_SCFH			0xbe4a4
#define TV_SCP			0xbe4a8
#define TV_DELAYBYPASS		0xbe4b4
#define TV_EQL_END		0xbe4bc
#define TV_SERR_START		0xbe4c0
#define TV_SERR_END		0xbe4c4
#define TV_CTL			0xbe4dc	/* reflects a previous register- MVFCLR, MVPCLR etc P241*/
#define TV_VSYNC_VGA_HS		0xbe4e8
#define TV_FLICK_XMIN		0xbe514
#define TV_FLICK_XMAX		0xbe518
#define TV_FLICK_YMIN		0xbe51c
#define TV_FLICK_YMAX		0xbe520

/*
 * Graphics Co-processor
 */
#define CO_REG_CONTROL		0xbf011
#define CO_CTRL_BUSY			0x80
#define CO_CTRL_CMDFULL			0x04
#define CO_CTRL_FIFOEMPTY		0x02
#define CO_CTRL_READY			0x01

#define CO_REG_SRC_WIDTH	0xbf018
#define CO_REG_PIXFMT		0xbf01c
#define CO_PIXFMT_32BPP			0x03
#define CO_PIXFMT_24BPP			0x02
#define CO_PIXFMT_16BPP			0x01
#define CO_PIXFMT_8BPP			0x00

#define CO_REG_FGMIX		0xbf048
#define CO_FG_MIX_ZERO			0x00
#define CO_FG_MIX_SRC_AND_DST		0x01
#define CO_FG_MIX_SRC_AND_NDST		0x02
#define CO_FG_MIX_SRC			0x03
#define CO_FG_MIX_NSRC_AND_DST		0x04
#define CO_FG_MIX_DST			0x05
#define CO_FG_MIX_SRC_XOR_DST		0x06
#define CO_FG_MIX_SRC_OR_DST		0x07
#define CO_FG_MIX_NSRC_AND_NDST		0x08
#define CO_FG_MIX_SRC_XOR_NDST		0x09
#define CO_FG_MIX_NDST			0x0a
#define CO_FG_MIX_SRC_OR_NDST		0x0b
#define CO_FG_MIX_NSRC			0x0c
#define CO_FG_MIX_NSRC_OR_DST		0x0d
#define CO_FG_MIX_NSRC_OR_NDST		0x0e
#define CO_FG_MIX_ONES			0x0f

#define CO_REG_FGCOLOUR		0xbf058
#define CO_REG_BGCOLOUR		0xbf05c
#define CO_REG_PIXWIDTH		0xbf060
#define CO_REG_PIXHEIGHT	0xbf062
#define CO_REG_X_PHASE		0xbf078
#define CO_REG_CMD_L		0xbf07c
#define CO_CMD_L_PATTERN_FGCOL		0x8000
#define CO_CMD_L_INC_LEFT		0x0004
#define CO_CMD_L_INC_UP			0x0002

#define CO_REG_CMD_H		0xbf07e
#define CO_CMD_H_BGSRCMAP		0x8000	/* otherwise bg colour */
#define CO_CMD_H_FGSRCMAP		0x2000	/* otherwise fg colour */
#define CO_CMD_H_BLITTER		0x0800

#define CO_REG_SRC1_PTR		0xbf170
#define CO_REG_SRC2_PTR		0xbf174
#define CO_REG_DEST_PTR		0xbf178
#define CO_REG_DEST_WIDTH	0xbf218

/*
 * Private structure
 */
struct cfb_info;

struct cyberpro_info {
	struct pci_dev	*dev;
	unsigned char	__iomem *regs;
	char		__iomem *fb;
	char		dev_name[32];
	unsigned int	fb_size;
	unsigned int	chip_id;

	/*
	 * The following is a pointer to be passed into the
	 * functions below.  The modules outside the main
	 * cyber2000fb.c driver have no knowledge as to what
	 * is within this structure.
	 */
	struct cfb_info *info;

	/*
	 * Use these to enable the BM or TV registers.  In an SMP
	 * environment, these two function pointers should only be
	 * called from the module_init() or module_exit()
	 * functions.
	 */
	void (*enable_extregs)(struct cfb_info *);
	void (*disable_extregs)(struct cfb_info *);
};

#define ID_IGA_1682		0
#define ID_CYBERPRO_2000	1
#define ID_CYBERPRO_2010	2
#define ID_CYBERPRO_5000	3

struct fb_var_screeninfo;

/*
 * Note! Writing to the Cyber20x0 registers from an interrupt
 * routine is definitely a bad idea atm.
 */
int cyber2000fb_attach(struct cyberpro_info *info, int idx);
void cyber2000fb_detach(int idx);
void cyber2000fb_enable_extregs(struct cfb_info *cfb);
void cyber2000fb_disable_extregs(struct cfb_info *cfb);
void cyber2000fb_get_fb_var(struct cfb_info *cfb, struct fb_var_screeninfo *var);