reg_bits.h

Linux环境下视频显示卡设备的驱动程序源代码

#define VSCTRL_VPIXFMT_YUV12	((0x9) << FShft(VSCTRL_VPIXFMT))
#define VSCTRL_VPIXFMT_UY0VY1	((0xc) << FShft(VSCTRL_VPIXFMT))
#define VSCTRL_VPIXFMT_VY0UY1	((0xd) << FShft(VSCTRL_VPIXFMT))
#define VSCTRL_VPIXFMT_Y0UY1V	((0xe) << FShft(VSCTRL_VPIXFMT))
#define VSCTRL_VPIXFMT_Y0VY1U	((0xf) << FShft(VSCTRL_VPIXFMT))
#define VSCTRL_GAMMA_EN		(1 << 26)
#define VSCTRL_CSC_EN		(1 << 25)
#define VSCTRL_COSITED		(1 << 22)
#define VSCTRL_VSWIDTH		Fld(11,11)
#define Vsctrl_Width(Pixels) /* Video Width [1-2048] */ \
			(((Pixels) - 1) << FShft(VSCTRL_VSWIDTH))
#define VSCTRL_VSHEIGHT		Fld(11,0)
#define Vsctrl_Height(Pixels) /* Video Height [1-2048] */ \
			(((Pixels) - 1) << FShft(VSCTRL_VSHEIGHT))

/* VBBASE - Video Blending Base Register */
#define VBBASE_GLALPHA		Fld(8,24)
#define Vbbase_Glalpha(x)	((x) << FShft(VBBASE_GLALPHA))

#define VBBASE_COLKEY		Fld(24,0)
#define Vbbase_Colkey(x)	((x) << FShft(VBBASE_COLKEY))

/* VCMSK - Video Color Key Mask Register */
#define VCMSK_COLKEY_M		Fld(24,0)
#define Vcmsk_colkey_m(x)	((x) << FShft(VCMSK_COLKEY_M))

/* VSCADR - Video Stream Control Rddress Register */
#define VSCADR_STR_EN		(1 << 31)
#define VSCADR_COLKEY_EN	(1 << 30)
#define VSCADR_COLKEYSRC	(1 << 29)
#define VSCADR_BLEND_M		Fld(2,27)
#define VSCADR_BLEND_NONE	((0x0) << FShft(VSCADR_BLEND_M))
#define VSCADR_BLEND_INV	((0x1) << FShft(VSCADR_BLEND_M))
#define VSCADR_BLEND_GLOB	((0x2) << FShft(VSCADR_BLEND_M))
#define VSCADR_BLEND_PIX	((0x3) << FShft(VSCADR_BLEND_M))
#define VSCADR_BLEND_POS	Fld(2,24)
#define VSCADR_BLEND_GFX	((0x0) << FShft(VSCADR_BLEND_POS))
#define VSCADR_BLEND_VID	((0x1) << FShft(VSCADR_BLEND_POS))
#define VSCADR_BLEND_CUR	((0x2) << FShft(VSCADR_BLEND_POS))
#define VSCADR_VBASE_ADR	Fld(23,0)
#define Vscadr_Vbase_Adr(x)	((x) << FShft(VSCADR_VBASE_ADR))

/* VUBASE - Video U Base Register */
#define VUBASE_UVHALFSTR	(1 << 31)
#define VUBASE_UBASE_ADR	Fld(24,0)
#define Vubase_Ubase_Adr(x)	((x) << FShft(VUBASE_UBASE_ADR))

/* VVBASE - Video V Base Register */
#define VVBASE_VBASE_ADR	Fld(24,0)
#define Vvbase_Vbase_Adr(x)	((x) << FShft(VVBASE_VBASE_ADR))

/* VSADR - Video Stride Address Register */
#define VSADR_SRCSTRIDE		Fld(10,22)
#define Vsadr_Srcstride(x)	((x) << FShft(VSADR_SRCSTRIDE))
#define VSADR_XSTART		Fld(11,11)
#define Vsadr_Xstart(x)		((x) << FShft(VSADR_XSTART))
#define VSADR_YSTART		Fld(11,0)
#define Vsadr_Ystart(x)		((x) << FShft(VSADR_YSTART))

/* HCCTRL - Hardware Cursor Register fields */
#define HCCTRL_CUR_EN	(1 << 31)
#define HCCTRL_COLKEY_EN	(1 << 29)
#define HCCTRL_COLKEYSRC	(1 << 28)
#define HCCTRL_BLEND_M	Fld(2,26)
#define HCCTRL_BLEND_NONE	((0x0) << FShft(HCCTRL_BLEND_M))
#define HCCTRL_BLEND_INV	((0x1) << FShft(HCCTRL_BLEND_M))
#define HCCTRL_BLEND_GLOB	((0x2) << FShft(HCCTRL_BLEND_M))
#define HCCTRL_BLEND_PIX	((0x3) << FShft(HCCTRL_BLEND_M))
#define HCCTRL_CPIXFMT	Fld(3,23)
#define HCCTRL_CPIXFMT_RGB332	((0x3) << FShft(HCCTRL_CPIXFMT))
#define HCCTRL_CPIXFMT_ARGB4444	((0x4) << FShft(HCCTRL_CPIXFMT))
#define HCCTRL_CPIXFMT_ARGB1555	((0x5) << FShft(HCCTRL_CPIXFMT))
#define HCCTRL_CBASE_ADR	Fld(23,0)
#define Hcctrl_Cbase_Adr(x)	((x) << FShft(HCCTRL_CBASE_ADR))

/* HCSIZE Hardware Cursor Size Register fields */
#define HCSIZE_BLEND_POS	Fld(2,29)
#define HCSIZE_BLEND_GFX	((0x0) << FShft(HCSIZE_BLEND_POS))
#define HCSIZE_BLEND_VID	((0x1) << FShft(HCSIZE_BLEND_POS))
#define HCSIZE_BLEND_CUR	((0x2) << FShft(HCSIZE_BLEND_POS))
#define HCSIZE_CWIDTH	Fld(3,16)
#define Hcsize_Cwidth(x)	((x) << FShft(HCSIZE_CWIDTH))
#define HCSIZE_CHEIGHT	Fld(3,0)
#define Hcsize_Cheight(x)	((x) << FShft(HCSIZE_CHEIGHT))

/* HCPOS Hardware Cursor Position Register fields */
#define HCPOS_SWITCHSRC	(1 << 30)
#define HCPOS_CURBLINK	Fld(6,24)
#define Hcpos_Curblink(x)	((x) << FShft(HCPOS_CURBLINK))
#define HCPOS_XSTART	Fld(12,12)
#define Hcpos_Xstart(x)	((x) << FShft(HCPOS_XSTART))
#define HCPOS_YSTART	Fld(12,0)
#define Hcpos_Ystart(y)	((y) << FShft(HCPOS_YSTART))

/* HCBADR Hardware Cursor Blend Address Register */
#define HCBADR_GLALPHA	Fld(8,24)
#define Hcbadr_Glalpha(x)	((x) << FShft(HCBADR_GLALPHA))
#define HCBADR_COLKEY	Fld(24,0)
#define Hcbadr_Colkey(x)	((x) << FShft(HCBADR_COLKEY))

/* HCCKMSK - Hardware Cursor Color Key Mask Register */
#define HCCKMSK_COLKEY_M	Fld(24,0)
#define Hcckmsk_Colkey_M(x)	((x) << FShft(HCCKMSK_COLKEY_M))

/* DSCTRL - Display sync control register */
#define DSCTRL_SYNCGEN_EN	(1 << 31)
#define DSCTRL_DPL_RST		(1 << 29)
#define DSCTRL_PWRDN_M		(1 << 28)
#define DSCTRL_UPDSYNCCNT	(1 << 26)
#define DSCTRL_UPDINTCNT	(1 << 25)
#define DSCTRL_UPDCNT		(1 << 24)
#define DSCTRL_UPDWAIT	Fld(4,16)
#define Dsctrl_Updwait(x)	((x) << FShft(DSCTRL_UPDWAIT))
#define DSCTRL_CLKPOL		(1 << 11)
#define DSCTRL_CSYNC_EN		(1 << 10)
#define DSCTRL_VS_SLAVE		(1 << 7)
#define DSCTRL_HS_SLAVE		(1 << 6)
#define DSCTRL_BLNK_POL		(1 << 5)
#define DSCTRL_BLNK_DIS		(1 << 4)
#define DSCTRL_VS_POL		(1 << 3)
#define DSCTRL_VS_DIS		(1 << 2)
#define DSCTRL_HS_POL		(1 << 1)
#define DSCTRL_HS_DIS		(1 << 0)

/* DHT01 - Display horizontal timing register 01 */
#define DHT01_HBPS	Fld(12,16)
#define Dht01_Hbps(x)	((x) << FShft(DHT01_HBPS))
#define DHT01_HT	Fld(12,0)
#define Dht01_Ht(x)	((x) << FShft(DHT01_HT))

/* DHT02 - Display horizontal timing register 02 */
#define DHT02_HAS	Fld(12,16)
#define Dht02_Has(x)	((x) << FShft(DHT02_HAS))
#define DHT02_HLBS	Fld(12,0)
#define Dht02_Hlbs(x)	((x) << FShft(DHT02_HLBS))

/* DHT03 - Display horizontal timing register 03 */
#define DHT03_HFPS	Fld(12,16)
#define Dht03_Hfps(x)	((x) << FShft(DHT03_HFPS))
#define DHT03_HRBS	Fld(12,0)
#define Dht03_Hrbs(x)	((x) << FShft(DHT03_HRBS))

/* DVT01 - Display vertical timing register 01 */
#define DVT01_VBPS	Fld(12,16)
#define Dvt01_Vbps(x)	((x) << FShft(DVT01_VBPS))
#define DVT01_VT	Fld(12,0)
#define Dvt01_Vt(x)	((x) << FShft(DVT01_VT))

/* DVT02 - Display vertical timing register 02 */
#define DVT02_VAS	Fld(12,16)
#define Dvt02_Vas(x)	((x) << FShft(DVT02_VAS))
#define DVT02_VTBS	Fld(12,0)
#define Dvt02_Vtbs(x)	((x) << FShft(DVT02_VTBS))

/* DVT03 - Display vertical timing register 03 */
#define DVT03_VFPS	Fld(12,16)
#define Dvt03_Vfps(x)	((x) << FShft(DVT03_VFPS))
#define DVT03_VBBS	Fld(12,0)
#define Dvt03_Vbbs(x)	((x) << FShft(DVT03_VBBS))

/* DVECTRL - display vertical event control register */
#define DVECTRL_VEVENT	Fld(12,16)
#define Dvectrl_Vevent(x)	((x) << FShft(DVECTRL_VEVENT))
#define DVECTRL_VFETCH	Fld(12,0)
#define Dvectrl_Vfetch(x)	((x) << FShft(DVECTRL_VFETCH))

/* DHDET - display horizontal DE timing register */
#define DHDET_HDES	Fld(12,16)
#define Dhdet_Hdes(x)	((x) << FShft(DHDET_HDES))
#define DHDET_HDEF	Fld(12,0)
#define Dhdet_Hdef(x)	((x) << FShft(DHDET_HDEF))

/* DVDET - display vertical DE timing register */
#define DVDET_VDES	Fld(12,16)
#define Dvdet_Vdes(x)	((x) << FShft(DVDET_VDES))
#define DVDET_VDEF	Fld(12,0)
#define Dvdet_Vdef(x)	((x) << FShft(DVDET_VDEF))

/* DODMSK - display output data mask register */
#define DODMSK_MASK_LVL	(1 << 31)
#define DODMSK_BLNK_LVL	(1 << 30)
#define DODMSK_MASK_B	Fld(8,16)
#define Dodmsk_Mask_B(x)	((x) << FShft(DODMSK_MASK_B))
#define DODMSK_MASK_G	Fld(8,8)
#define Dodmsk_Mask_G(x)	((x) << FShft(DODMSK_MASK_G))
#define DODMSK_MASK_R	Fld(8,0)
#define Dodmsk_Mask_R(x)	((x) << FShft(DODMSK_MASK_R))

/* DBCOL - display border color control register */
#define DBCOL_BORDCOL	Fld(24,0)
#define Dbcol_Bordcol(x)	((x) << FShft(DBCOL_BORDCOL))

/* DVLNUM - display vertical line number register */
#define DVLNUM_VLINE	Fld(12,0)
#define Dvlnum_Vline(x)	((x) << FShft(DVLNUM_VLINE))

/* DMCTRL - Display Memory Control Register */
#define DMCTRL_MEM_REF	Fld(2,30)
#define DMCTRL_MEM_REF_ACT	((0x0) << FShft(DMCTRL_MEM_REF))
#define DMCTRL_MEM_REF_HB	((0x1) << FShft(DMCTRL_MEM_REF))
#define DMCTRL_MEM_REF_VB	((0x2) << FShft(DMCTRL_MEM_REF))
#define DMCTRL_MEM_REF_BOTH	((0x3) << FShft(DMCTRL_MEM_REF))
#define DMCTRL_UV_THRHLD	Fld(6,24)
#define Dmctrl_Uv_Thrhld(x)	((x) << FShft(DMCTRL_UV_THRHLD))
#define DMCTRL_V_THRHLD		Fld(7,16)
#define Dmctrl_V_Thrhld(x)	((x) << FShft(DMCTRL_V_THRHLD))
#define DMCTRL_D_THRHLD		Fld(7,8)
#define Dmctrl_D_Thrhld(x)	((x) << FShft(DMCTRL_D_THRHLD))
#define DMCTRL_BURSTLEN	Fld(6,0)
#define Dmctrl_Burstlen(x)	((x) << FShft(DMCTRL_BURSTLEN))

/* DINTRS - Display Interrupt Status Register */
#define DINTRS_CUR_OR_S		(1 << 18)
#define DINTRS_STR2_OR_S	(1 << 17)
#define DINTRS_STR1_OR_S	(1 << 16)
#define DINTRS_CUR_UR_S		(1 << 6)
#define DINTRS_STR2_UR_S	(1 << 5)
#define DINTRS_STR1_UR_S	(1 << 4)
#define DINTRS_VEVENT1_S	(1 << 3)
#define DINTRS_VEVENT0_S	(1 << 2)
#define DINTRS_HBLNK1_S		(1 << 1)
#define DINTRS_HBLNK0_S		(1 << 0)

/* DINTRE - Display Interrupt Enable Register */
#define DINTRE_CUR_OR_EN	(1 << 18)
#define DINTRE_STR2_OR_EN	(1 << 17)
#define DINTRE_STR1_OR_EN	(1 << 16)
#define DINTRE_CUR_UR_EN	(1 << 6)
#define DINTRE_STR2_UR_EN	(1 << 5)
#define DINTRE_STR1_UR_EN	(1 << 4)
#define DINTRE_VEVENT1_EN	(1 << 3)
#define DINTRE_VEVENT0_EN	(1 << 2)
#define DINTRE_HBLNK1_EN	(1 << 1)
#define DINTRE_HBLNK0_EN	(1 << 0)

/* DINTRS - Display Interrupt Status Register */
#define DINTRS_CUR_OR_S		(1 << 18)
#define DINTRS_STR2_OR_S	(1 << 17)
#define DINTRS_STR1_OR_S	(1 << 16)
#define DINTRS_CUR_UR_S		(1 << 6)
#define DINTRS_STR2_UR_S	(1 << 5)
#define DINTRS_STR1_UR_S	(1 << 4)
#define DINTRS_VEVENT1_S	(1 << 3)
#define DINTRS_VEVENT0_S	(1 << 2)
#define DINTRS_HBLNK1_S		(1 << 1)
#define DINTRS_HBLNK0_S		(1 << 0)

/* DINTRE - Display Interrupt Enable Register */
#define DINTRE_CUR_OR_EN	(1 << 18)
#define DINTRE_STR2_OR_EN	(1 << 17)
#define DINTRE_STR1_OR_EN	(1 << 16)
#define DINTRE_CUR_UR_EN	(1 << 6)
#define DINTRE_STR2_UR_EN	(1 << 5)
#define DINTRE_STR1_UR_EN	(1 << 4)
#define DINTRE_VEVENT1_EN	(1 << 3)
#define DINTRE_VEVENT0_EN	(1 << 2)
#define DINTRE_HBLNK1_EN	(1 << 1)
#define DINTRE_HBLNK0_EN	(1 << 0)


/* DLSTS - display load status register */
#define DLSTS_RLD_ADONE	(1 << 23)
/* #define DLSTS_RLD_ADOUT	Fld(23,0) */

/* DLLCTRL - display list load control register */
#define DLLCTRL_RLD_ADRLN	Fld(8,24)
#define Dllctrl_Rld_Adrln(x)	((x) << FShft(DLLCTRL_RLD_ADRLN))

/* CLIPCTRL - Clipping Control Register */
#define CLIPCTRL_HSKIP		Fld(11,16)
#define Clipctrl_Hskip		((x) << FShft(CLIPCTRL_HSKIP))
#define CLIPCTRL_VSKIP		Fld(11,0)
#define Clipctrl_Vskip		((x) << FShft(CLIPCTRL_VSKIP))

/* SPOCTRL - Scale Pitch/Order Control Register */
#define SPOCTRL_H_SC_BP		(1 << 31)
#define SPOCTRL_V_SC_BP		(1 << 30)
#define SPOCTRL_HV_SC_OR	(1 << 29)
#define SPOCTRL_VS_UR_C		(1 << 27)
#define SPOCTRL_VORDER		Fld(2,16)
#define SPOCTRL_VORDER_1TAP	((0x0) << FShft(SPOCTRL_VORDER))
#define SPOCTRL_VORDER_2TAP	((0x1) << FShft(SPOCTRL_VORDER))
#define SPOCTRL_VORDER_4TAP	((0x3) << FShft(SPOCTRL_VORDER))
#define SPOCTRL_VPITCH		Fld(16,0)
#define Spoctrl_Vpitch(x)	((x) << FShft(SPOCTRL_VPITCH))

/* SVCTRL - Scale Vertical Control Register */
#define SVCTRL_INITIAL1		Fld(16,16)
#define Svctrl_Initial1(x)	((x) << FShft(SVCTRL_INITIAL1))
#define SVCTRL_INITIAL2		Fld(16,0)
#define Svctrl_Initial2(x)	((x) << FShft(SVCTRL_INITIAL2))

/* SHCTRL - Scale Horizontal Control Register */
#define SHCTRL_HINITIAL		Fld(16,16)
#define Shctrl_Hinitial(x)	((x) << FShft(SHCTRL_HINITIAL))
#define SHCTRL_HDECIM		(1 << 15)
#define SHCTRL_HPITCH		Fld(15,0)
#define Shctrl_Hpitch(x)	((x) << FShft(SHCTRL_HPITCH))

/* SSSIZE - Scale Surface Size Register */
#define SSSIZE_SC_WIDTH		Fld(11,16)
#define Sssize_Sc_Width(x)	((x) << FShft(SSSIZE_SC_WIDTH))
#define SSSIZE_SC_HEIGHT	Fld(11,0)
#define Sssize_Sc_Height(x)	((x) << FShft(SSSIZE_SC_HEIGHT))

#endif /* __REG_BITS_2700G_ */