reg_exchange.sim.rpt

来自「以C语言和Java语言、嵌入式开发、算法实现为主」· RPT 代码 · 共 367 行 · 第 1/3 页

; |reg_exchange|w0[6]                         ; |reg_exchange|w0[6]                         ; regout           ;
; |reg_exchange|w0[7]                         ; |reg_exchange|w0[7]                         ; regout           ;
; |reg_exchange|w0[8]                         ; |reg_exchange|w0[8]                         ; regout           ;
; |reg_exchange|w0[9]                         ; |reg_exchange|w0[9]                         ; regout           ;
; |reg_exchange|w1[1]                         ; |reg_exchange|w1[1]                         ; regout           ;
; |reg_exchange|w1[3]                         ; |reg_exchange|w1[3]                         ; regout           ;
; |reg_exchange|w1[4]                         ; |reg_exchange|w1[4]                         ; regout           ;
; |reg_exchange|w1[6]                         ; |reg_exchange|w1[6]                         ; regout           ;
; |reg_exchange|w1[8]                         ; |reg_exchange|w1[8]                         ; regout           ;
; |reg_exchange|w2[6]                         ; |reg_exchange|w2[6]                         ; regout           ;
; |reg_exchange|w2[7]                         ; |reg_exchange|w2[7]                         ; regout           ;
; |reg_exchange|w2[8]                         ; |reg_exchange|w2[8]                         ; regout           ;
; |reg_exchange|w2[9]                         ; |reg_exchange|w2[9]                         ; regout           ;
; |reg_exchange|w3[3]                         ; |reg_exchange|w3[3]                         ; regout           ;
; |reg_exchange|w3[4]                         ; |reg_exchange|w3[4]                         ; regout           ;
; |reg_exchange|w3[5]                         ; |reg_exchange|w3[5]                         ; regout           ;
; |reg_exchange|w3[6]                         ; |reg_exchange|w3[6]                         ; regout           ;
; |reg_exchange|w3[7]                         ; |reg_exchange|w3[7]                         ; regout           ;
; |reg_exchange|w3[8]                         ; |reg_exchange|w3[8]                         ; regout           ;
; |reg_exchange|w3[9]                         ; |reg_exchange|w3[9]                         ; regout           ;
; |reg_exchange|ireg2[0]                      ; |reg_exchange|ireg2[0]                      ; combout          ;
; |reg_exchange|ireg0[0]                      ; |reg_exchange|ireg0[0]                      ; combout          ;
; |reg_exchange|acs_0                         ; |reg_exchange|acs_0                         ; combout          ;
; |reg_exchange|ireg2[1]                      ; |reg_exchange|ireg2[1]                      ; combout          ;
; |reg_exchange|ireg0[1]                      ; |reg_exchange|ireg0[1]                      ; combout          ;
; |reg_exchange|ireg2[2]                      ; |reg_exchange|ireg2[2]                      ; combout          ;
; |reg_exchange|ireg0[2]                      ; |reg_exchange|ireg0[2]                      ; combout          ;
; |reg_exchange|ireg2[3]                      ; |reg_exchange|ireg2[3]                      ; combout          ;
; |reg_exchange|ireg0[3]                      ; |reg_exchange|ireg0[3]                      ; combout          ;
; |reg_exchange|ireg2[4]                      ; |reg_exchange|ireg2[4]                      ; combout          ;
; |reg_exchange|ireg0[4]                      ; |reg_exchange|ireg0[4]                      ; combout          ;
; |reg_exchange|ireg2[5]                      ; |reg_exchange|ireg2[5]                      ; combout          ;
; |reg_exchange|ireg0[5]                      ; |reg_exchange|ireg0[5]                      ; combout          ;
; |reg_exchange|ireg2[6]                      ; |reg_exchange|ireg2[6]                      ; combout          ;
; |reg_exchange|ireg0[6]                      ; |reg_exchange|ireg0[6]                      ; combout          ;
; |reg_exchange|ireg2[7]                      ; |reg_exchange|ireg2[7]                      ; combout          ;
; |reg_exchange|ireg0[7]                      ; |reg_exchange|ireg0[7]                      ; combout          ;
; |reg_exchange|ireg2[8]                      ; |reg_exchange|ireg2[8]                      ; combout          ;
; |reg_exchange|ireg0[8]                      ; |reg_exchange|ireg0[8]                      ; combout          ;
; |reg_exchange|acs_1                         ; |reg_exchange|acs_1                         ; combout          ;
; |reg_exchange|ireg3[0]                      ; |reg_exchange|ireg3[0]                      ; combout          ;
; |reg_exchange|ireg1[0]                      ; |reg_exchange|ireg1[0]                      ; combout          ;
; |reg_exchange|acs_2                         ; |reg_exchange|acs_2                         ; combout          ;
; |reg_exchange|ireg3[1]                      ; |reg_exchange|ireg3[1]                      ; combout          ;
; |reg_exchange|ireg1[1]                      ; |reg_exchange|ireg1[1]                      ; combout          ;
; |reg_exchange|ireg3[2]                      ; |reg_exchange|ireg3[2]                      ; combout          ;
; |reg_exchange|ireg1[2]                      ; |reg_exchange|ireg1[2]                      ; combout          ;
; |reg_exchange|ireg3[3]                      ; |reg_exchange|ireg3[3]                      ; combout          ;
; |reg_exchange|ireg1[3]                      ; |reg_exchange|ireg1[3]                      ; combout          ;
; |reg_exchange|ireg3[4]                      ; |reg_exchange|ireg3[4]                      ; combout          ;
; |reg_exchange|ireg1[4]                      ; |reg_exchange|ireg1[4]                      ; combout          ;
; |reg_exchange|ireg3[5]                      ; |reg_exchange|ireg3[5]                      ; combout          ;
; |reg_exchange|ireg1[5]                      ; |reg_exchange|ireg1[5]                      ; combout          ;
; |reg_exchange|ireg3[6]                      ; |reg_exchange|ireg3[6]                      ; combout          ;
; |reg_exchange|ireg1[6]                      ; |reg_exchange|ireg1[6]                      ; combout          ;
; |reg_exchange|ireg3[7]                      ; |reg_exchange|ireg3[7]                      ; combout          ;
; |reg_exchange|ireg1[7]                      ; |reg_exchange|ireg1[7]                      ; combout          ;
; |reg_exchange|ireg3[8]                      ; |reg_exchange|ireg3[8]                      ; combout          ;
; |reg_exchange|ireg1[8]                      ; |reg_exchange|ireg1[8]                      ; combout          ;
; |reg_exchange|acs_3                         ; |reg_exchange|acs_3                         ; combout          ;
; |reg_exchange|oreg0[0]                      ; |reg_exchange|oreg0[0]                      ; padio            ;
; |reg_exchange|oreg0[1]                      ; |reg_exchange|oreg0[1]                      ; padio            ;
; |reg_exchange|oreg0[2]                      ; |reg_exchange|oreg0[2]                      ; padio            ;
; |reg_exchange|oreg0[5]                      ; |reg_exchange|oreg0[5]                      ; padio            ;
; |reg_exchange|oreg0[6]                      ; |reg_exchange|oreg0[6]                      ; padio            ;
; |reg_exchange|oreg0[7]                      ; |reg_exchange|oreg0[7]                      ; padio            ;
; |reg_exchange|oreg0[8]                      ; |reg_exchange|oreg0[8]                      ; padio            ;
; |reg_exchange|oreg0[9]                      ; |reg_exchange|oreg0[9]                      ; padio            ;
; |reg_exchange|oreg1[0]                      ; |reg_exchange|oreg1[0]                      ; padio            ;
; |reg_exchange|oreg1[1]                      ; |reg_exchange|oreg1[1]                      ; padio            ;
; |reg_exchange|oreg1[3]                      ; |reg_exchange|oreg1[3]                      ; padio            ;
; |reg_exchange|oreg1[4]                      ; |reg_exchange|oreg1[4]                      ; padio            ;
; |reg_exchange|oreg1[6]                      ; |reg_exchange|oreg1[6]                      ; padio            ;
; |reg_exchange|oreg1[8]                      ; |reg_exchange|oreg1[8]                      ; padio            ;
; |reg_exchange|oreg2[0]                      ; |reg_exchange|oreg2[0]                      ; padio            ;
; |reg_exchange|oreg2[6]                      ; |reg_exchange|oreg2[6]                      ; padio            ;
; |reg_exchange|oreg2[7]                      ; |reg_exchange|oreg2[7]                      ; padio            ;
; |reg_exchange|oreg2[8]                      ; |reg_exchange|oreg2[8]                      ; padio            ;
; |reg_exchange|oreg2[9]                      ; |reg_exchange|oreg2[9]                      ; padio            ;
; |reg_exchange|oreg3[0]                      ; |reg_exchange|oreg3[0]                      ; padio            ;
; |reg_exchange|oreg3[3]                      ; |reg_exchange|oreg3[3]                      ; padio            ;
; |reg_exchange|oreg3[4]                      ; |reg_exchange|oreg3[4]                      ; padio            ;
; |reg_exchange|oreg3[5]                      ; |reg_exchange|oreg3[5]                      ; padio            ;
; |reg_exchange|oreg3[6]                      ; |reg_exchange|oreg3[6]                      ; padio            ;
; |reg_exchange|oreg3[7]                      ; |reg_exchange|oreg3[7]                      ; padio            ;
; |reg_exchange|oreg3[8]                      ; |reg_exchange|oreg3[8]                      ; padio            ;
; |reg_exchange|oreg3[9]                      ; |reg_exchange|oreg3[9]                      ; padio            ;
; |reg_exchange|~STRATIX_FITTER_CREATED_GND~I ; |reg_exchange|~STRATIX_FITTER_CREATED_GND~I ; combout          ;
+---------------------------------------------+---------------------------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+--------------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage                                                                                     ;
+---------------------------------------------+---------------------------------------------+------------------+
; Node Name                                   ; Output Port Name                            ; Output Port Type ;
+---------------------------------------------+---------------------------------------------+------------------+
; |reg_exchange|w0[1]                         ; |reg_exchange|w0[1]                         ; regout           ;
; |reg_exchange|w0[2]                         ; |reg_exchange|w0[2]                         ; regout           ;
; |reg_exchange|w0[3]                         ; |reg_exchange|w0[3]                         ; regout           ;
; |reg_exchange|w0[4]                         ; |reg_exchange|w0[4]                         ; regout           ;
; |reg_exchange|w0[5]                         ; |reg_exchange|w0[5]                         ; regout           ;
; |reg_exchange|w0[6]                         ; |reg_exchange|w0[6]                         ; regout           ;
; |reg_exchange|w0[7]                         ; |reg_exchange|w0[7]                         ; regout           ;
; |reg_exchange|w0[8]                         ; |reg_exchange|w0[8]                         ; regout           ;
; |reg_exchange|w0[9]                         ; |reg_exchange|w0[9]                         ; regout           ;
; |reg_exchange|w1[1]                         ; |reg_exchange|w1[1]                         ; regout           ;
; |reg_exchange|w1[2]                         ; |reg_exchange|w1[2]                         ; regout           ;
; |reg_exchange|w1[3]                         ; |reg_exchange|w1[3]                         ; regout           ;
; |reg_exchange|w1[4]                         ; |reg_exchange|w1[4]                         ; regout           ;
; |reg_exchange|w1[5]                         ; |reg_exchange|w1[5]                         ; regout           ;
; |reg_exchange|w1[6]                         ; |reg_exchange|w1[6]                         ; regout           ;
; |reg_exchange|w1[7]                         ; |reg_exchange|w1[7]                         ; regout           ;
; |reg_exchange|w1[8]                         ; |reg_exchange|w1[8]                         ; regout           ;
; |reg_exchange|w1[9]                         ; |reg_exchange|w1[9]                         ; regout           ;
; |reg_exchange|w2[1]                         ; |reg_exchange|w2[1]                         ; regout           ;
; |reg_exchange|w2[2]                         ; |reg_exchange|w2[2]                         ; regout           ;
; |reg_exchange|w2[3]                         ; |reg_exchange|w2[3]                         ; regout           ;
; |reg_exchange|w2[4]                         ; |reg_exchange|w2[4]                         ; regout           ;
; |reg_exchange|w2[5]                         ; |reg_exchange|w2[5]                         ; regout           ;
; |reg_exchange|w2[6]                         ; |reg_exchange|w2[6]                         ; regout           ;
; |reg_exchange|w2[7]                         ; |reg_exchange|w2[7]                         ; regout           ;
; |reg_exchange|w2[8]                         ; |reg_exchange|w2[8]                         ; regout           ;