conv_213.vhd

来自「以C语言和Java语言、嵌入式开发、算法实现为主」· VHDL 代码 · 共 35 行

--conv_213.vhd   (2,1,3) juan ji ma of G=(111,101)
--v0.1
--06-10-2

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;

entity conv_213 is
	port(
		clk: in std_logic;
		reset: in std_logic;
		inp	 : in std_logic;
		outp : out std_logic_vector(1 downto 0)
		);
end conv_213;

architecture a of conv_213 is
signal df    : std_logic_vector(2 downto 0);
begin
	process(clk,reset,inp)
	begin
	if rising_edge(clk) then
		if reset='1' then
			df<="000";
		else 
			df(1 downto 0)<=df(2 downto 1);
			df(2)<=inp;
		end if ;
	end if;
	end process;
	outp(0)<=df(0) xor df(1) xor df(2);
	outp(1)<=df(0) xor df(2);
end a;