📄 fmd.cpp
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//**********************************************************************
//
// Filename: FMD.CPP
//
// Description: FLASH Media Driver Interface for Intel XXXXXX StrataFlash
// Chip
//
// THIS CODE AND INFORMATION IS PROVIDED "AS IS" WITHOUT WARRANTY OF
// ANY KIND, EITHER EXPRESSED OR IMPLIED, INCLUDING BUT NOT LIMITED TO
// THE IMPLIED WARRANTIES OF MERCHANTABILITY AND/OR FITNESS FOR A
// PARTICULAR PURPOSE.
//
// Use of this source code is subject to the terms of the Cirrus end-user
// license agreement (EULA) under which you licensed this SOFTWARE PRODUCT.
// If you did not accept the terms of the EULA, you are not authorized to
// use this source code. For a copy of the EULA, please see the
// EULA.RTF on your install media.
//
// Copyright(c) Cirrus Logic Corporation 2005, All Rights Reserved
//
//**********************************************************************
/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Notes: The FAL expects the Flash media to be broken up into Flash blocks
which are then subdivided into physical sectors. Some types of
Flash memory (i.e. NAND Flash) already have this layout. NOR Flash,
on the other hand, DOES NOT breakup each Flash block into physical
sectors. Instead, each byte is individually addressable (like RAM).
Despite this characteristic, NOR Flash can still logically be broken
up into discrete sectors as follows:
NOR Flash
Sector Data SectorInfo
---------------------------------
|Sector(0) | |
|Sector(1) | |
|Sector(2) | | Block 0
|... | |
|Sector(k) | |
| XXXXXXXXX
-------------------------------
|Sector(k+1) | |
|Sector(k+2) | |
|Sector(k+3) | | Block 1
|... | |
|Sector(2k) | |
| XXXXXXXXX
-------------------------------
| | |
| | |
| | | Block 2
| | |
| | |
| XXXXXXXXX
------------------------------- ...
| | |
| | |
| | | Block N
| | |
| | |
| XXXXXXXXX
---------------------------------
That is, each NOR Flash block is logically subdivided into a "page", where each page
contains space for sector data and SectorInfo metadata. Most often, Flash blocks are
a power of 2 in size but the size of a page is not a power of 2 (i.e. 512 + 8 = 520 bytes).
Thus, each Flash block DOES NOT evenly divide into an integral number of pages and some
bytes in a block are left unused. These unused bytes are denoted above by XXXXX's.
To help clarify how this process works, consider the following example: suppose you have
a NOR Flash memory device that contains 256 Flash blocks each 256K in size. From these
size characteristics, we find:
(256K / (512+8)) ==> 504 sectors + 64 unused bytes
Therefore, each Flash block can map 504 sectors (including SectorInfo metadata) and leave
64 unused bytes per block. Notice that 8 bytes is used for the SectorInfo metadata although
the SectorInfo structure is currently only 6 bytes. The reason for this is to make sure that
all sector addresses are DWORD aligned (i.e. 520 divides by 4 evenly while 518 doesn't divide
by 4 evenly). Furthemore, we see that this NOR Flash memory can map (504*256)==>129,024 physical
sectors.
-------
Two other points are worth mentioning:
1) NOR Flash memory is guaranteed by manufacturing to ship with no bad Flash blocks.
2) NOR Flash memory doesn't suffer from electrical leakage currents (like NAND Flash) and
does not require error-correction codes (ECC) to insure data integrity.
Environment: As noted, this media driver works on behalf of the FAL to directly
access the underlying FLASH hardware. Consquently, this module
needs to be linked with FAL.LIB to produce the device driver
named FLASHDRV.DLL.
-----------------------------------------------------------------------------*/
#include <fmd.h>
#include <ceddk.h>
#ifdef READ_FROM_REGISTRY
#include <ddkreg.h>
#endif // READ_FROM_REGISTRY.
#include <hwdefs.h>
#include "strata.h"
/*----------------------------------------------------------------------------------------------------*/
static BOOL g_bPairedFlash = TRUE; // Indicates whether or not two flash parts are paired to create a 32-bit data interface.
#define ZONE_ERROR 1
#define MIN(a, b) (a < b ? a : b)
static BOOL g_bXIPMode = FALSE;
static FMD_FLASH_INFO g_FMDInfo;
static SysRegionInfo_t g_FlashRegion[IntelRegionNUM];
unsigned long oldval;
/*---------------------------------------------------------------------------------------------------*/
BOOLEAN InitializeFlash(volatile ULONG * pChipBaseAddress, ULONG ChipFlashLength,volatile ULONG * pBaseAddress, ULONG FlashLength);
DWORD DoBufferedWrite(volatile ULONG ulBlockAddress,
volatile SECTOR_ADDR physicalSectorAddr,
PUCHAR pBuffer,
USHORT NumWriteBytes);
#define flash_debug 0
#define have_buffer_write 1
#define flash_amd 1
#define intel_no_b3c3 1
#define AMD_unlock 0
/*--------------------------------------------------------------------------------------------------*/
BOOL GetEraseFlashSectorIndex(ULONG dwStartAddr)
{
DWORD i,j,dwEraseLen;
dwEraseLen = dwStartAddr;
//RETAILMSG(1, (TEXT("get is or not align =%x).\r\n"),dwEraseLen));
if(dwEraseLen==0)
{
return TRUE;
}
for(i = 0; i <g_FMDInfo.Geometry.NumEraseBlocks; i++)
{
for(j = 0; j< g_FlashRegion[i].blocks; j++)
{
if(dwEraseLen > g_FlashRegion[i].block_size)
{
dwEraseLen = dwEraseLen - g_FlashRegion[i].block_size;
//RETAILMSG(1, (TEXT(" > block_size =%x. i=%x,j=%x\r\n"),g_FlashRegion[i].block_size,i,j));
}
else if(dwEraseLen ==g_FlashRegion[i].block_size)
{
g_FMDInfo.gdwCurEraseRegion = i;
g_FMDInfo.gdwCurEraseBlock = j;
//RETAILMSG(1, (TEXT(" = block_size =%x.i=%x,j=%x\r\n"),g_FlashRegion[i].block_size,i,j));
return TRUE;
}
else
{
g_FMDInfo.gdwCurEraseRegion = i;
g_FMDInfo.gdwCurEraseBlock = j;
RETAILMSG(1, (TEXT(" < block_size =%x.i=%x,j=%x\r\n"),g_FlashRegion[i].block_size,i,j));
return FALSE;
}
}
}
return FALSE;
}
/*--------------------------------------------------------------------------------------------------*/
void SetWriteProtect(BOOL bprotect)
{
/*
volatile unsigned long val;
if(bprotect)
{
val = oldval;
}
else
{
oldval = *SMC_SMCBCR6 ;
val = oldval & ~SMCBCR_WP ; // Enable Bit WP
}
*SMC_SMCBCR6 = val;
*/
}
void SetSMCInit(void)
{
volatile unsigned long val;
oldval = *SMC_SMCBCR6 ;
}
void SetSMCDeflaut(void)
{
volatile unsigned long val;
*SMC_SMCBCR6 = oldval ;
}
/*
void SetSMCInterface(void)
{
volatile unsigned long val;
val=(*SMC_SMCBCR6)&(0x30000000);
if(g_bPairedFlash==TRUE)
*SMC_SMCBCR6=(val | (15<<SMCBCR_WST2_SHIFT) |
SMCBCR_RBLE | (15<<SMCBCR_WST1_SHIFT) | (1<<SMCBCR_IDCY_SHIFT));
else
*SMC_SMCBCR6=(val | (15<<SMCBCR_WST2_SHIFT) |
SMCBCR_RBLE | (15<<SMCBCR_WST1_SHIFT) | (1<<SMCBCR_IDCY_SHIFT));
}
*/
void SetSMCInterface(void)
{
volatile unsigned long val;
#if 1//flash_debug
RETAILMSG(1, (TEXT("INFO: SMC %x\r\n"),*SMC_SMCBCR6));
#endif
val=(*SMC_SMCBCR6)&(0x30000000);
if(g_bPairedFlash==TRUE)
*SMC_SMCBCR6=(val | (0x1f<<SMCBCR_WST2_SHIFT) |
SMCBCR_RBLE | (0x1f<<SMCBCR_WST1_SHIFT) | (0xf<<SMCBCR_IDCY_SHIFT));
else
*SMC_SMCBCR6=(val | (0x1f<<SMCBCR_WST2_SHIFT) |
SMCBCR_RBLE | (0x1f<<SMCBCR_WST1_SHIFT) | (0xf<<SMCBCR_IDCY_SHIFT));
#if 1//flash_debug
RETAILMSG(1, (TEXT("INFO: SMC %x\r\n"),*SMC_SMCBCR6));
#endif
}
/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function: FMD_Init()
Description: Initializes the Flash memory device.
Returns: Boolean indicating success.
------------------------------------------------------------------------------*/
PVOID FMD_Init(LPCTSTR lpActiveReg, PPCI_REG_INFO pRegIn, PPCI_REG_INFO pRegOut)
{
volatile ULONG * pBaseAddress = NULL;
volatile ULONG * pChipBaseAddress = NULL;
ULONG FlashLength = 0,ChipFlashLength=0;
BOOL bLastMode;
RETAILMSG(1, (TEXT("INFO: FMD_Init.\r\n")));
#ifdef READ_FROM_REGISTRY
if (lpActiveReg != NULL)
{
DDKWINDOWINFO dwi;
HKEY hConfig;
// Get flash information from the registry.
hConfig = OpenDeviceKey((LPCTSTR)lpActiveReg);
if (hConfig == NULL)
{
RETAILMSG(1, (TEXT("ERROR: FMD_Init: OpenDeviceKey failed.\r\n")));
return(NULL);
}
dwi.cbSize = sizeof(dwi);
if (DDKReg_GetWindowInfo(hConfig, &dwi) != ERROR_SUCCESS)
{
RETAILMSG(1, (TEXT("ERROR: FMD_Init: DDKReg_GetWindowInfo() failed.\r\n")));
return(NULL);
}
// The first memory window contains the base address and length of our flash part.
if (dwi.dwNumMemWindows)
{
pBaseAddress = (volatile ULONG *)(dwi.memWindows[1].dwBase);
FlashLength = (ULONG)(dwi.memWindows[1].dwLen);
pChipBaseAddress = (volatile ULONG *)(dwi.memWindows[0].dwBase);
ChipFlashLength = (ULONG)(dwi.memWindows[0].dwLen);
}
}
#else
// Get flash base address and length from caller.
if (!pRegIn || !pRegIn->MemBase.Num || !pRegIn->MemLen.Num)
{
RETAILMSG(1, (TEXT("ERROR: FMD_Init: invalid flash memory base and/or length specified by caller.\r\n")));
return(NULL);
}
else
{
pBaseAddress = (volatile ULONG *)pRegIn->MemBase.Reg[1];
FlashLength = pRegIn->MemLen.Reg[1];
pChipBaseAddress = (volatile ULONG *)pRegIn->MemBase.Reg[0];
ChipFlashLength = pRegIn->MemLen.Reg[0];
}
#endif // READ_FROM_REGISTRY.
// Run in kernel mode.
bLastMode = SetKMode(TRUE);
//
//resetting the smc interface
//
SetSMCInterface();
// Identify the flash part and collect device information.
//
SetWriteProtect(FALSE);
if (!InitializeFlash(pChipBaseAddress,ChipFlashLength,pBaseAddress, FlashLength))
{
RETAILMSG(1, (TEXT("ERROR: FMD_Init: Failed to initialize flash.\r\n")));
SetKMode(bLastMode);
return(NULL);
}
SetWriteProtect(TRUE);
RETAILMSG(1, (TEXT("INFO: FMD_Init: Flash Address=0x%x Length=0x%x.\r\n"), (ULONG)pBaseAddress, FlashLength));
SetKMode(bLastMode);
return((PVOID)pBaseAddress);
}
/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function: FMD_Deinit()
Description: De-initializes the Flash memory device.
Returns: Boolean indicating success.
------------------------------------------------------------------------------*/
BOOL FMD_Deinit(PVOID pBaseAddress)
{
return(TRUE);
}
/*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Function: FMD_GetInfo()
Description: Determines the size characteristics for the Flash memory device.
Notes: Notice that although each byte of a NOR Flash block is individually
addressable, the media is still logically broken up into sectors.
To compute the number of sectors per block, you have to divide the
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