📄 init.s
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//*****************************************************************************
//
// INIT.S - Code which is loaded into the Cirrus Logic ARM processor via the
// boot.S to SDRAM.
//
// Copyright (c) 2006 Cirrus Logic, Inc.
//
//*****************************************************************************
#include "asmdefs.h"
//*****************************************************************************
//
// The read-only code area.
//
//*****************************************************************************
_TEXT_
//
// The C main entry.
//
_IMPORT_ main
//
// This is the entry point of the program.
//
_ENTRY_
//
// This is the interrupt vector table.
// Relative address because of uncertain SDRAM base address.
//
add pc, pc, _CONST_ 0x38
ldr pc, [pc, _CONST_ 0x18]
ldr pc, [pc, _CONST_ 0x18]
ldr pc, [pc, _CONST_ 0x18]
ldr pc, [pc, _CONST_ 0x18]
ldr pc, [pc, _CONST_ 0x18]
ldr pc, [pc, _CONST_ 0x18]
ldr pc, [pc, _CONST_ 0x18]
jump_table _LABEL_
_WORD_ 0x00000000
_WORD_ 0x00000000 + 0x04
_WORD_ 0x00000000 + 0x08
_WORD_ 0x00000000 + 0x0c
_WORD_ 0x00000000 + 0x10
_WORD_ 0x00000000 + 0x14
_WORD_ 0x00000000 + 0x18
_WORD_ 0x00000000 + 0x1c
//*****************************************************************************
//
// Builds the page table.
//
//*****************************************************************************
reset _LABEL_
//
// Set the stack pointer to 0x00600000
//
ldr r13, =0x00600000
//
// Load a pointer to the page table.
//
mov r11, pc
and r11, r11, _CONST_ 0xf0000000
orr r0, r11, _CONST_ 0x00004000
//
// Clear out the page table.
//
mov r1, r0
mov r2, _CONST_ 0x00004000
mov r3, _CONST_ 0x00000000
clear _LABEL_
str r3, [r1], _CONST_ 4
subs r2, r2, _CONST_ 4
bne clear
//
// Create a non-cacheable/non-bufferable mapping of SDRAM
// at 0x0000_0000, only map 8M for this program.
//
mov r1, r0
mov r2, _CONST_ 0x00000020
orr r3, r11, _CONST_ 0x00000012
orr r3, r3, _CONST_ 0x00000c00
map_sdram _LABEL_
str r3, [r1], _CONST_ 4
add r3, r3, _CONST_ 0x00100000
subs r2, r2, _CONST_ 4
bne map_sdram
//
// Create a read-write mapping of FLASH nCS6
// at virtual address 0x6000_0000.
//
add r1, r0, _CONST_ 0x00001800
mov r2, _CONST_ 0x00000400
ldr r3, =0x60000c12
map_flash_6 _LABEL_
str r3, [r1], _CONST_ 4
add r3, r3, _CONST_ 0x00100000
subs r2, r2, _CONST_ 4
bne map_flash_6
//
// Create a read-write mapping of the hardware registers
// at virtual address 0x8000_0000.
//
add r1, r0, _CONST_ 0x00002000
mov r2, _CONST_ 0x00000400
ldr r3, =0x80000c12
map_hw _LABEL_
str r3, [r1], _CONST_ 4
add r3, r3, _CONST_ 0x00100000
subs r2, r2, _CONST_ 4
bne map_hw
//
// Setup the MMU.
//
orr r0, r11, _CONST_ 0x00004000
mcr p15, 0, r0, c2, c0, 0
mov r0, _CONST_ 0x00000003
mcr p15, 0, r0, c3, c0, 0
//
// Enable the MMU and branch to our equivalent virtual address.
//
ldr r0, =0xc0000079
ldr r1, =go_virtual
mov r2, r11
sub r1, r1, r2
bic r1, r1, _CONST_ 0xf0000000
mcr p15, 0, r0, c1, c0, 0
mov pc, r1
go_virtual _LABEL_
nop
//
// Switch to C entry
//
bl main
_END_
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