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📄 sst25vf020.c

📁 EP9315的wince下载程序。download.exe
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//****************************************************************************
//
// sst25vf020.c - Routines for erasing and programing the sst25vf020
//               eeprom.
//
// Copyright (c) 2006 Cirrus Logic, Inc.
//
//****************************************************************************


#include "ep93xx.h"
#include "timer.h" 
#include "spi.h"
#include "sst25vf020.h"

//-----------------------------------------------------------------------------
// sst25vf020_transaction do with the buffer for write&read
//-----------------------------------------------------------------------------
static void sst25vf020_transaction(unsigned char *tBuffer,unsigned char *rBuffer,int length)
{
    int i;
    i=0;
	
    SSP1->SSPCR1.Value = 0;
    //
    // send the bytes of data to eeprom
    //
    while(length>0)
    {
        SSP1->SSPDR.Value = tBuffer[i];
        length--;
        i++;
    }
     
    //
    // set SSPC1_SSE value
    //
    SSP1->SSPCR1.Value = 0x10;
    i=0;
	
	//
    // Wait for the Transmit FIFO to empty
    //
    while(!SSP1->SSPSR.Field.TFE);
    delay_usec(30);   
	 
    //
    // Get the bytes of data that are actually read back from eeprom
    //
    while(SSP1->SSPSR.Field.RNE)
    {
        rBuffer[i]=(unsigned char)SSP1->SSPDR.Value;
        i++;
        delay_usec(1);	    
    }
}


//-----------------------------------------------------------------------------
// sst25vf020_get_ready let the chip ready
//-----------------------------------------------------------------------------
static int sst25vf020_get_ready(void)
{
    unsigned char tBuffer[2];
    unsigned char rBuffer[2];
    
    //
    // Send the read command to status register
    //
    tBuffer[0] = SST25VF020_READ_STATUS_REGISTER;
    tBuffer[1] = 0;

    //
    // Get the status of eeprom 
    //
    sst25vf020_transaction( tBuffer, rBuffer, 2);
    
    //
    // Get  ready status of status register
    //
    if(rBuffer[1] & SST25VF020_STATUS_READY) return 0;
    
    return 1;
}


//-----------------------------------------------------------------------------
// init_sst25vf020 chip init
//-----------------------------------------------------------------------------
void init_sst25vf020(void)
{
    unsigned long ulChipID=0;	
    //
    // Disable the ssp, disable interrupts
    //
    SSP1->SSPCR1.Value = 0;
   
    //
    // Set GPIO pins 12 and 14 as outputs.
    //
    *((volatile unsigned int *)(PBDDR)) = (0x50);
           
    //
    // Set GPIO pins 12 and 14 high to disable the keyboard.
    //
    *((volatile unsigned int *)(PBDR)) = (0x50);
     
    //
    // Set GPIO pin 6 and 7 as an outputs.
    //
    *((volatile unsigned int *)(PADDR)) = (0xc0);
    
    //
    // Clear GPIO pin 7 to enable the frame line.
    // Set GPIO pin 6 to disable the CS4271.
    //
    *((volatile unsigned int *)(PADR)) = (0x00);
    *((volatile unsigned int *)(PADR)) = (0x40);

    //
    // Set FGPIO pin 0 as an output.
    //
    *((volatile unsigned int *)(PFDDR)) = (0x01);
    
    //
    // Set FGPIO pin 0 to disable the TLV2542.
    //
    *((volatile unsigned int *)(PFDR)) = (0x01);

    //
    // Set the enable bit(SSE) in SSP1CR1
    //
      SSP1->SSPCR1.Value = 0x10;

    //
    //program the SSP1CRO register
    //
    SSP1->SSPCR0.Value = 0x000001c7;
    
    //
    //Read the chip id
    //
    ulChipID = *((volatile unsigned int *)(CHIPID));
    
    //
    // Program the predivisor register.
    //
    //if(((ulChipID&0xf0000000)>>28)>=0x0111)
    if(((ulChipID&0xf0000000)>>28)>=0x7)
    {   
    	//
    	//if Chip REV >=E2,the diver =4;
    	//
    	SSP1->SSPCPSR.Value = 4;
    }
    else
    {
    	//
    	//if Chip REV <=E1,(E0)the diver =2;
    	//
    	SSP1->SSPCPSR.Value = 2;
    }

    //
    // Clear the enable bit(SSE) in SSP1CR1
    //
    SSP1->SSPCR1.Value = 0;

    //
    // Set the enable bit(SSE) in SSP1CR1
    //
    // 
    SSP1->SSPCR1.Value = 0x10;
}

//-----------------------------------------------------------------------------
// query_sst25vf020 chip query
//-----------------------------------------------------------------------------
int query_sst25vf020(unsigned int manu_id,unsigned int device_id)
{   
    unsigned char tBuffer[8];
    unsigned char rBuffer[8];
    
    //
    // Send the READ_ID command
    //
    tBuffer[0] = SST25VF020_READ_ID;
    tBuffer[1] = 0;
    tBuffer[2] = 0;
    tBuffer[3] = 0;
    tBuffer[4] = 0;
    tBuffer[5] = 0;
    
    //
    // Get the Manu_ID and Device_ID from eeprom
    //
    sst25vf020_transaction( tBuffer, rBuffer, 6);
    
    //
    // Compare the ID got from eeprom with sst25vf020's ID
    //
    if ((manu_id ==(unsigned int)rBuffer[4])&(device_id==(unsigned int)rBuffer[5]))
        return 1;
    else
        return 0;
  
 }

//-----------------------------------------------------------------------------
// query_sst25vf040B chip query
//-----------------------------------------------------------------------------
int query_sst25vf040(unsigned int manu_id,unsigned int device_id)
{   
    unsigned char tBuffer[8];
    unsigned char rBuffer[8];
    
    //
    // Send the READ_ID command
    //
    tBuffer[0] = SST25VF020_READ_ID;
    tBuffer[1] = 0;
    tBuffer[2] = 0;
    tBuffer[3] = 0;
    tBuffer[4] = 0;
    tBuffer[5] = 0;
    
    //
    // Get the Manu_ID and Device_ID from eeprom
    //
    sst25vf020_transaction( tBuffer, rBuffer, 6);
    
    //
    // Compare the ID got from eeprom with sst25vf020's ID
    //
    if ((manu_id ==(unsigned int)rBuffer[4])&(device_id==(unsigned int)rBuffer[5]))
        return 1;
    else
        return 0;
  
 }
//-----------------------------------------------------------------------------
// erase_sst25vf020 chip erase
//-----------------------------------------------------------------------------
int erase_sst25vf020(unsigned int addrOffset, int length)
{
    unsigned char tBuffer[4];
    unsigned char rBuffer[4];
    unsigned int addrBase,addr;
    
    if(addrOffset>2*1024*1024/8)
    	return 2;
    else if(addrOffset+length>2*1024*1024/8)
    	return 0;
    	
    for(addrBase=0; addrBase<length; addrBase+=0x1000)
    {
    addr =  addrBase+addrOffset;
 
    //
    // Send the enable_write command to status register
    //
    tBuffer[0] = SST25VF020_ENABLE_WRITE_STATUS_REGISTER; 
    
    //
    // Finish the phase of writing command
    //    
    sst25vf020_transaction( tBuffer, rBuffer, 1);

    //
    // Send the write command to status register
    //
    tBuffer[0] = SST25VF020_WRITE_STATUS_REGISTER; 
    tBuffer[1] = 0;
    
    //
    // Finish the phase of writing status register
    //  
    sst25vf020_transaction( tBuffer, rBuffer, 2);
 
    //
    // Send the write_enable command to status register
    //
    tBuffer[0] = SST25VF020_WRITE_ENABLE;  
    
    //
    // Finish the phase of writing enable command
    //  
    sst25vf020_transaction( tBuffer, rBuffer, 1);

    //
    // Send the sector_erase command and the address to eeprom 
    //
    tBuffer[0] = SST25VF020_SECTOR_ERASE;
    tBuffer[1] = addr >> 16;
    tBuffer[2] = addr >> 8;
    tBuffer[3] = addr;
    
    //
    // Finish the phase of writing sector_erase command
    //  
    sst25vf020_transaction( tBuffer, rBuffer, 4);

    //
    // Get the ready status of status register
    //
    while( !sst25vf020_get_ready() )
    {
        delay_usec(1);
    }
		
    } 
     
    return 1;

}

//-----------------------------------------------------------------------------
// erase_sst25vf040B chip erase
//-----------------------------------------------------------------------------
int erase_sst25vf040(unsigned int addrOffset, int length)
{
    unsigned char tBuffer[4];
    unsigned char rBuffer[4];
    unsigned int addrBase,addr;

    if(addrOffset>4*1024*1024/8)
    	return 2;    
    else if(addrOffset+length>4*1024*1024/8)
    	return 0;
    	
    for(addrBase=0; addrBase<length; addrBase+=0x1000)
    {
    addr =  addrBase+addrOffset;
 
    //
    // Send the enable_write command to status register
    //
    tBuffer[0] = SST25VF020_ENABLE_WRITE_STATUS_REGISTER; 
    
    //
    // Finish the phase of writing command

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