📄 ep93xx.h
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#define INTSTATUSA (GPIO_BASE + 0x00A0)
#define RAWINTSTATUSA (GPIO_BASE + 0x00A4)
#define GPIOADB (GPIO_BASE + 0x00A8)
#define GPIOBINTTYPE1 (GPIO_BASE + 0x00AC)
#define GPIOBINTTYPE2 (GPIO_BASE + 0x00B0)
#define GPIOBEOI (GPIO_BASE + 0x00B4)
#define GPIOBINTEN (GPIO_BASE + 0x00B8)
#define INTSTSB (GPIO_BASE + 0x00BC)
#define RAWINTSTSB (GPIO_BASE + 0x00C0)
#define GPIOBDB (GPIO_BASE + 0x00C4)
#define EEDRIVE (GPIO_BASE + 0x00C8)
// AC'97
#define AC97_BASE (REGS_BASE + 0x00880000)
#define AC97DR1 (AC97_BASE + 0x0000)
#define AC97RXCR1 (AC97_BASE + 0x0004)
#define AC97TXCR1 (AC97_BASE + 0x0008)
#define AC97SR1 (AC97_BASE + 0x000C)
#define AC97RISR1 (AC97_BASE + 0x0010)
#define AC97ISR1 (AC97_BASE + 0x0014)
#define AC97IE1 (AC97_BASE + 0x0018)
#define AC97DR2 (AC97_BASE + 0x0020)
#define AC97RXCR2 (AC97_BASE + 0x0024)
#define AC97TXCR2 (AC97_BASE + 0x0028)
#define AC97SR2 (AC97_BASE + 0x002C)
#define AC97RISR2 (AC97_BASE + 0x0030)
#define AC97ISR2 (AC97_BASE + 0x0034)
#define AC97IE2 (AC97_BASE + 0x0038)
#define AC97DR3 (AC97_BASE + 0x0040)
#define AC97RXCR3 (AC97_BASE + 0x0044)
#define AC97TXCR3 (AC97_BASE + 0x0048)
#define AC97SR3 (AC97_BASE + 0x004C)
#define AC97RISR3 (AC97_BASE + 0x0050)
#define AC97ISR3 (AC97_BASE + 0x0054)
#define AC97IE3 (AC97_BASE + 0x0058)
#define AC97DR4 (AC97_BASE + 0x0060)
#define AC97RXCR4 (AC97_BASE + 0x0064)
#define AC97TXCR4 (AC97_BASE + 0x0068)
#define AC97SR4 (AC97_BASE + 0x006C)
#define AC97RISR4 (AC97_BASE + 0x0070)
#define AC97ISR4 (AC97_BASE + 0x0074)
#define AC97IE4 (AC97_BASE + 0x0078)
#define AC97S1DATA (AC97_BASE + 0x0080)
#define AC97S2DATA (AC97_BASE + 0x0084)
#define AC97S12DATA (AC97_BASE + 0x0088)
#define AC97RGIS (AC97_BASE + 0x008C)
#define AC97GIS (AC97_BASE + 0x0090)
#define AC97IM (AC97_BASE + 0x0094)
#define AC97EOI (AC97_BASE + 0x0098)
#define AC97GCR (AC97_BASE + 0x009C)
#define AC97RESET (AC97_BASE + 0x00A0)
#define AC97SYNC (AC97_BASE + 0x00A4)
#define AC97GCIS (AC97_BASE + 0x00A8)
// SPI
#define SPI_BASE (REGS_BASE + 0x008A0000)
#define SSP1CR0 (SPI_BASE + 0x0000)
#define SSP1CR1 (SPI_BASE + 0x0004)
#define SSP1DR (SPI_BASE + 0x0008)
#define SSP1SR (SPI_BASE + 0x000C)
#define SSP1CPSR (SPI_BASE + 0x0010)
#define SSP1IIR (SPI_BASE + 0x0014)
#define SSP1ICR (SPI_BASE + 0x0014)
// IrDA
#define IRDA_BASE (REGS_BASE + 0x008B0000)
#define IRENABLE (IRDA_BASE + 0x0000)
#define IRCTRL (IRDA_BASE + 0x0004)
#define IRADRMATCHVAL (IRDA_BASE + 0x0008)
#define IRFLAG (IRDA_BASE + 0x000C)
#define IRDATA (IRDA_BASE + 0x0010)
#define IRDATATAIL (IRDA_BASE + 0x0014)
#define IRRIB (IRDA_BASE + 0x0020)
#define IRTR0 (IRDA_BASE + 0x0024)
#define MIIR (IRDA_BASE + 0x0088)
// UART1
#define UART1_BASE (REGS_BASE + 0x008C0000)
#define UART1DATA (UART1_BASE + 0x0000)
#define UART1RXSTS (UART1_BASE + 0x0004)
#define UART1LINCTRLHIGH (UART1_BASE + 0x0008)
#define UART1LINCTRLMID (UART1_BASE + 0x000C)
#define UART1LINCTRLLOW (UART1_BASE + 0x0010)
#define UART1CTRL (UART1_BASE + 0x0014)
#define UART1FLAG (UART1_BASE + 0x0018)
#define UART1INTIDINTCLR (UART1_BASE + 0x001C)
#define UART1DMACTRL (UART1_BASE + 0x0028)
#define UART1MODEMCTRL (UART1_BASE + 0x0100)
#define UART1MODEMSTS (UART1_BASE + 0x0104)
// UART2
#define UART2_BASE (REGS_BASE + 0x008D0000)
#define UART2DATA (UART2_BASE + 0x0000)
#define UART2RXSTS (UART2_BASE + 0x0004)
#define UART2LINCTRLHIGH (UART2_BASE + 0x0008)
#define UART2LINCTRLMID (UART2_BASE + 0x000C)
#define UART2LINCTRLLOW (UART2_BASE + 0x0010)
#define UART2CTRL (UART2_BASE + 0x0014)
#define UART2FLAG (UART2_BASE + 0x0018)
#define UART2INTIDINTCLR (UART2_BASE + 0x001C)
#define UART2IRLOWPWRCNTR (UART2_BASE + 0x0020)
#define UART2DMACTRL (UART2_BASE + 0x0028)
// UART3
#define UART3_BASE (REGS_BASE + 0x008E0000)
#define UART3DATA (UART3_BASE + 0x0000)
#define UART3RXSTS (UART3_BASE + 0x0004)
#define UART3LINCTRLHIGH (UART3_BASE + 0x0008)
#define UART3LINCTRLMID (UART3_BASE + 0x000C)
#define UART3LINCTRLLOW (UART3_BASE + 0x0010)
#define UART3CTRL (UART3_BASE + 0x0014)
#define UART3FLAG (UART3_BASE + 0x0018)
#define UART3INTIDINTCLR (UART3_BASE + 0x001C)
#define UART3IRLOWPWRCNTR (UART3_BASE + 0x0020)
#define UART3DMACTRL (UART3_BASE + 0x0028)
#define UART3MODEMCTRL (UART1_BASE + 0x0100)
#define UART3MODEMSTS (UART1_BASE + 0x0104)
#define UART3MODEMTSTCTRL (UART1_BASE + 0x0108)
// KEY
#define KEY_BASE (REGS_BASE +0x008F0000)
#define KEYSCANINIT (KEY_BASE + 0x0000)
#define KEYDIAGNOSTIC (KEY_BASE + 0x0004)
#define KEYREGISTER (KEY_BASE + 0x0008)
// TOUCH
#define TOUCH_BASE (REGS_BASE + 0x00900000)
#define TSSETUP (TOUCH_BASE + 0x0000)
#define TSXYMAXMIN (TOUCH_BASE + 0x0004)
#define TSXYRESULT (TOUCH_BASE + 0x0008)
#define TSDISCHARGE (TOUCH_BASE + 0x000C)
#define TSXSAMPLE (TOUCH_BASE + 0x0010)
#define TSYSAMPLE (TOUCH_BASE + 0x0014)
#define TSDIRECT (TOUCH_BASE + 0x0018)
#define TSDETECT (TOUCH_BASE + 0x001C)
#define TSSWLOCK (TOUCH_BASE + 0x0020)
#define TSSETUP2 (TOUCH_BASE + 0x0024)
// PWM
#define PWM_BASE (REGS_BASE + 0x00910000)
#define PWM0TERMCNT (PWM_BASE + 0x0000)
#define PWM0DUTYCYCLE (PWM_BASE + 0x0004)
#define PWM0EN (PWM_BASE + 0x0008)
#define PWM0INVERT (PWM_BASE + 0x000C)
#define PWM0SYNC (PWM_BASE + 0x0010)
#define PWM1TC (PWM_BASE + 0x0020)
#define PWM1DC (PWM_BASE + 0x0024)
#define PWM1EN (PWM_BASE + 0x0028)
#define PWM1INV (PWM_BASE + 0x002C)
#define PWM1SYNC (PWM_BASE + 0x0030)
// RTC
#define RTC_BASE (REGS_BASE + 0x00920000)
#define RTCDATA (RTC_BASE + 0x0000)
#define RTCMATCH (RTC_BASE + 0x0004)
#define RTCSTS (RTC_BASE + 0x0008)
#define RTCLOAD (RTC_BASE + 0x000C)
#define RTCCTRL (RTC_BASE + 0x0010)
#define RTCSWCOMP (RTC_BASE + 0x0108)
// SYSCON
#define SYSCON_BASE (REGS_BASE + 0x00930000)
#define PWRSTS (SYSCON_BASE + 0x0000)
#define PWRCNT (SYSCON_BASE + 0x0004)
#define HALT (SYSCON_BASE + 0x0008)
#define STBY (SYSCON_BASE + 0x000C)
#define TEOI (SYSCON_BASE + 0x0018)
#define STFCLR (SYSCON_BASE + 0x001C)
#define CLKSET1 (SYSCON_BASE + 0x0020)
#define CLKSET2 (SYSCON_BASE + 0x0024)
#define SCRATCHREG0 (SYSCON_BASE + 0x0040)
#define SCRATCHREG1 (SYSCON_BASE + 0x0044)
#define APBWAIT (SYSCON_BASE + 0x0050)
#define BUSMSTRARB (SYSCON_BASE + 0x0054)
#define BOOTMODECLR (SYSCON_BASE + 0x0058)
#define DEVICECFG (SYSCON_BASE + 0x0080)
#define VIDCLKDIV (SYSCON_BASE + 0x0084)
#define MIRCLKDIV (SYSCON_BASE + 0x0088)
#define I2SCLKDIV (SYSCON_BASE + 0x008C)
#define KEYTCHCLKDIV (SYSCON_BASE + 0x0090)
#define CHIPID (SYSCON_BASE + 0x0094)
#define SYSCFG (SYSCON_BASE + 0x009C)
#define SYSSWLOCK (SYSCON_BASE + 0x00C0)
// WATCHDOG
#define WATCHDOG_BASE (REGS_BASE + 0x00940000)
#define WATCHDOG (WATCHDOG_BASE + 0x00)
#define WDSTATUS (WATCHDOG_BASE + 0x04)
// General purpose declarations
#define BIT0 0x00000001 /* Bit-0 position */
#define BIT1 0x00000002 /* Bit-1 position */
#define BIT2 0x00000004 /* Bit-2 position */
#define BIT3 0x00000008 /* Bit-3 position */
#define BIT4 0x00000010 /* Bit-4 position */
#define BIT5 0x00000020 /* Bit-5 position */
#define BIT6 0x00000040 /* Bit-6 position */
#define BIT7 0x00000080 /* Bit-7 position */
#define BIT8 0x00000100 /* Bit-8 position */
#define BIT9 0x00000200 /* Bit-9 position */
#define BIT10 0x00000400 /* Bit-10 position */
#define BIT11 0x00000800 /* Bit-11 position */
#define BIT12 0x00001000 /* Bit-12 position */
#define BIT13 0x00002000 /* Bit-13 position */
#define BIT14 0x00004000 /* Bit-14 position */
#define BIT15 0x00008000 /* Bit-15 position */
#define BIT16 0x00010000 /* Bit-16 position */
#define BIT17 0x00020000 /* Bit-17 position */
#define BIT18 0x00040000 /* Bit-18 position */
#define BIT19 0x00080000 /* Bit-19 position */
#define BIT20 0x00100000 /* Bit-20 position */
#define BIT21 0x00200000 /* Bit-21 position */
#define BIT22 0x00400000 /* Bit-22 position */
#define BIT23 0x00800000 /* Bit-23 position */
#define BIT24 0x01000000 /* Bit-24 position */
#define BIT25 0x02000000 /* Bit-25 position */
#define BIT26 0x04000000 /* Bit-26 position */
#define BIT27 0x08000000 /* Bit-27 position */
#define BIT28 0x10000000 /* Bit-28 position */
#define BIT29 0x20000000 /* Bit-29 position */
#define BIT30 0x40000000 /* Bit-30 position */
#define BIT31 0x80000000 /* Bit-31 position */
// Interrupt Number allocation
#define INT1_COMMRX 2
#define INT1_COMMTX 3
#define INT1_TIMER1 4
#define INT1_TIMER2 5
#define INT1_AAC 6
#define INT1_DMAM2P0 7
#define INT1_DMAM2P1 8
#define INT1_DMAM2P2 9
#define INT1_DMAM2P3 10
#define INT1_DMAM2P4 11
#define INT1_DMAM2P5 12
#define INT1_DMAM2P6 13
#define INT1_DMAM2P7 14
#define INT1_DMAM2P8 15
#define INT1_DMAM2P9 16
#define INT1_DMAM2M0 17
#define INT1_DMAM2M1 18
#define INT1_GPIO0 20
#define INT1_GPIO1 21
#define INT1_GPIO2 22
#define INT1_UARTRX1 23
#define INT1_UARTTX1 24
#define INT1_UARTRX2 25
#define INT1_UARTTX2 26
#define INT2_EXT0 32
#define INT2_EXT1 33
#define INT2_TINTR 35
#define INT2_WEINT 36
#define INT2_RTC 37
#define INT2_IRDA 38
#define INT2_ETHERNET 39
#define INT2_EXT3 40
#define INT2_SSPRX 45
#define INT2_SSPTX 46
#define INT2_TIMER3 51
#define INT2_UART1 52
#define INT2_SPI 53
#define INT2_UART2 54
#define INT2_USB 56
#define INT2_GPIO 59
#define INT2_SAINTR 60
// Internal I/O macro
#define inb(n) (*((volatile unsigned char *)(n)))
#define outb(n,c) (*((volatile unsigned char *)(n)) = (c))
#define inw(n) (*((volatile unsigned short *)(n)))
#define outw(n,c) (*((volatile unsigned short *)(n)) = (c))
#define in(n) (*((volatile unsigned int *)(n)))
#define out(n,c) (*((volatile unsigned int *)(n)) = (c))
#define setb(n,c) (*((volatile unsigned char *)(n))|= (c))
#define clrb(n,c) (*((volatile unsigned char *)(n))&=~(c))
#define setw(n,c) (*((volatile unsigned short *)(n))|= (c))
#define clrw(n,c) (*((volatile unsigned short *)(n))&=~(c))
#define set(n,c) (*((volatile unsigned int *)(n))|= (c))
#define clr(n,c) (*((volatile unsigned int *)(n))&=~(c))
#ifdef __cplusplus
}
#endif
#endif
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