b1ld.c

spice中支持多层次元件模型仿真的可单独运行的插件源码

            } 

             /* determine DC current and derivatives */
            vbd = vbs - vds;
            vgd = vgs - vds;
            vgb = vgs - vbs;


            if(vbs <= 0.0 ) {
                gbs = SourceSatCurrent / CONSTvt0 + ckt->CKTgmin;
                cbs = gbs * vbs ;
            } else {
                evbs = exp(vbs/CONSTvt0);
                gbs = SourceSatCurrent*evbs/CONSTvt0 + ckt->CKTgmin;
                cbs = SourceSatCurrent * (evbs-1) + ckt->CKTgmin * vbs ;
            }
            if(vbd <= 0.0) {
                gbd = DrainSatCurrent / CONSTvt0 + ckt->CKTgmin;
                cbd = gbd * vbd ;
            } else {
                evbd = exp(vbd/CONSTvt0);
                gbd = DrainSatCurrent*evbd/CONSTvt0 +ckt->CKTgmin;
                cbd = DrainSatCurrent *(evbd-1)+ckt->CKTgmin*vbd;
            }
            /* line 400 */
            if(vds >= 0) {
                /* normal mode */
                here->B1mode = 1;
            } else {
                /* inverse mode */
                here->B1mode = -1;
            }
            /* call B1evaluate to calculate drain current and its 
             * derivatives and charge and capacitances related to gate
             * drain, and bulk
             */
           if( vds >= 0 )  {
                B1evaluate(vds,vbs,vgs,here,model,&gm,&gds,&gmbs,&qgate,
                    &qbulk,&qdrn,&cggb,&cgdb,&cgsb,&cbgb,&cbdb,&cbsb,&cdgb,
                    &cddb,&cdsb,&cdrain,&von,&vdsat,ckt);
            } else {
                B1evaluate(-vds,vbd,vgd,here,model,&gm,&gds,&gmbs,&qgate,
                    &qbulk,&qsrc,&cggb,&cgsb,&cgdb,&cbgb,&cbsb,&cbdb,&csgb,
                    &cssb,&csdb,&cdrain,&von,&vdsat,ckt);
            }
          
            here->B1von = model->B1type * von;
            here->B1vdsat = model->B1type * vdsat;  

        

            /*
             *  COMPUTE EQUIVALENT DRAIN CURRENT SOURCE
             */
            cd=here->B1mode * cdrain - cbd;
            if ((ckt->CKTmode & (MODETRAN | MODEAC | MODEINITSMSIG)) ||
                    ((ckt->CKTmode & MODETRANOP ) && 
                    (ckt->CKTmode & MODEUIC))) {
                /*
                 *  charge storage elements
                 *
                 *   bulk-drain and bulk-source depletion capacitances
                 *  czbd : zero bias drain junction capacitance
                 *  czbs : zero bias source junction capacitance
                 * czbdsw:zero bias drain junction sidewall capacitance
                 * czbssw:zero bias source junction sidewall capacitance
                 */

                czbd  = model->B1unitAreaJctCap * DrainArea;
                czbs  = model->B1unitAreaJctCap * SourceArea;
                czbdsw= model->B1unitLengthSidewallJctCap * DrainPerimeter;
                czbssw= model->B1unitLengthSidewallJctCap * SourcePerimeter;
                PhiB = model->B1bulkJctPotential;
                PhiBSW = model->B1sidewallJctPotential;
                MJ = model->B1bulkJctBotGradingCoeff;
                MJSW = model->B1bulkJctSideGradingCoeff;

                /* Source Bulk Junction */
                if( vbs < 0 ) {  
                    arg = 1 - vbs / PhiB;
                    argsw = 1 - vbs / PhiBSW;
                    sarg = exp(-MJ*log(arg));
                    sargsw = exp(-MJSW*log(argsw));
                    *(ckt->CKTstate0 + here->B1qbs) =
                        PhiB * czbs * (1-arg*sarg)/(1-MJ) + PhiBSW * 
                    czbssw * (1-argsw*sargsw)/(1-MJSW);
                    capbs = czbs * sarg + czbssw * sargsw ;
                } else {  
                    *(ckt->CKTstate0+here->B1qbs) =
                        vbs*(czbs+czbssw)+ vbs*vbs*(czbs*MJ*0.5/PhiB 
                        + czbssw * MJSW * 0.5/PhiBSW);
                    capbs = czbs + czbssw + vbs *(czbs*MJ/PhiB+
                        czbssw * MJSW / PhiBSW );
                }

                /* Drain Bulk Junction */
                if( vbd < 0 ) {  
                    arg = 1 - vbd / PhiB;
                    argsw = 1 - vbd / PhiBSW;
                    sarg = exp(-MJ*log(arg));
                    sargsw = exp(-MJSW*log(argsw));
                    *(ckt->CKTstate0 + here->B1qbd) =
                        PhiB * czbd * (1-arg*sarg)/(1-MJ) + PhiBSW * 
                    czbdsw * (1-argsw*sargsw)/(1-MJSW);
                    capbd = czbd * sarg + czbdsw * sargsw ;
                } else {  
                    *(ckt->CKTstate0+here->B1qbd) =
                        vbd*(czbd+czbdsw)+ vbd*vbd*(czbd*MJ*0.5/PhiB 
                        + czbdsw * MJSW * 0.5/PhiBSW);
                    capbd = czbd + czbdsw + vbd *(czbd*MJ/PhiB+
                        czbdsw * MJSW / PhiBSW );
                }

            }




            /*
             *  check convergence
             */
            if ( (here->B1off == 0)  || (!(ckt->CKTmode & MODEINITFIX)) ){
                if (Check == 1) {
                    ckt->CKTnoncon++;
		    ckt->CKTtroubleElt = (GENinstance *) here;
#ifndef NEWCONV
                } else {
                    tol=ckt->CKTreltol*MAX(FABS(cdhat),FABS(cd))+ckt->CKTabstol;
                    if (FABS(cdhat-cd) >= tol) { 
                        ckt->CKTnoncon++;
			ckt->CKTtroubleElt = (GENinstance *) here;
                    } else {
                        tol=ckt->CKTreltol*MAX(FABS(cbhat),FABS(cbs+cbd))+
                            ckt->CKTabstol;
                        if (FABS(cbhat-(cbs+cbd)) > tol) {
                            ckt->CKTnoncon++;
			    ckt->CKTtroubleElt = (GENinstance *) here;
                        }
                    }
#endif /* NEWCONV */
                }
            }
            *(ckt->CKTstate0 + here->B1vbs) = vbs;
            *(ckt->CKTstate0 + here->B1vbd) = vbd;
            *(ckt->CKTstate0 + here->B1vgs) = vgs;
            *(ckt->CKTstate0 + here->B1vds) = vds;
            *(ckt->CKTstate0 + here->B1cd) = cd;
            *(ckt->CKTstate0 + here->B1cbs) = cbs;
            *(ckt->CKTstate0 + here->B1cbd) = cbd;
            *(ckt->CKTstate0 + here->B1gm) = gm;
            *(ckt->CKTstate0 + here->B1gds) = gds;
            *(ckt->CKTstate0 + here->B1gmbs) = gmbs;
            *(ckt->CKTstate0 + here->B1gbd) = gbd;
            *(ckt->CKTstate0 + here->B1gbs) = gbs;

            *(ckt->CKTstate0 + here->B1cggb) = cggb;
            *(ckt->CKTstate0 + here->B1cgdb) = cgdb;
            *(ckt->CKTstate0 + here->B1cgsb) = cgsb;

            *(ckt->CKTstate0 + here->B1cbgb) = cbgb;
            *(ckt->CKTstate0 + here->B1cbdb) = cbdb;
            *(ckt->CKTstate0 + here->B1cbsb) = cbsb;

            *(ckt->CKTstate0 + here->B1cdgb) = cdgb;
            *(ckt->CKTstate0 + here->B1cddb) = cddb;
            *(ckt->CKTstate0 + here->B1cdsb) = cdsb;

            *(ckt->CKTstate0 + here->B1capbs) = capbs;
            *(ckt->CKTstate0 + here->B1capbd) = capbd;

           /* bulk and channel charge plus overlaps */

            if((!(ckt->CKTmode & (MODETRAN | MODEAC))) &&
                    ((!(ckt->CKTmode & MODETRANOP)) ||
                    (!(ckt->CKTmode & MODEUIC)))  && (!(ckt->CKTmode 
                    &  MODEINITSMSIG))) goto line850; 
         
line755:
            if( here->B1mode > 0 ) {

		args[0] = GateDrainOverlapCap;
		args[1] = GateSourceOverlapCap;
		args[2] = GateBulkOverlapCap;
		args[3] = capbd;
		args[4] = capbs;
		args[5] = cggb;
		args[6] = cgdb;
		args[7] = cgsb;

                B1mosCap(ckt,vgd,vgs,vgb,
			args,
			/*
			GateDrainOverlapCap,
			GateSourceOverlapCap,GateBulkOverlapCap,
			capbd,capbs,
                        cggb,cgdb,cgsb,
			*/
			cbgb,cbdb,cbsb,
			cdgb,cddb,cdsb,
                        &gcggb,&gcgdb,&gcgsb,
			&gcbgb,&gcbdb,&gcbsb,
			&gcdgb,&gcddb,&gcdsb,&gcsgb,&gcsdb,&gcssb,
			&qgate,&qbulk,
                        &qdrn,&qsrc);
            } else {

		args[0] = GateSourceOverlapCap;
		args[1] = GateDrainOverlapCap;
		args[2] = GateBulkOverlapCap;
		args[3] = capbs;
		args[4] = capbd;
		args[5] = cggb;
		args[6] = cgsb;
		args[7] = cgdb;

                B1mosCap(ckt,vgs,vgd,vgb,
			args,
			/*
			GateSourceOverlapCap,
			GateDrainOverlapCap,GateBulkOverlapCap,
			capbs,capbd,
			cggb,cgsb,cgdb,
			*/
			cbgb,cbsb,cbdb,
			csgb,cssb,csdb,
			&gcggb,&gcgsb,&gcgdb,
			&gcbgb,&gcbsb,&gcbdb,
			&gcsgb,&gcssb,&gcsdb,&gcdgb,&gcdsb,&gcddb,
			&qgate,&qbulk,
			&qsrc,&qdrn);
            }
             
            if(ByPass) goto line860;
            *(ckt->CKTstate0 + here->B1qg) = qgate;
            *(ckt->CKTstate0 + here->B1qd) = qdrn -  
                    *(ckt->CKTstate0 + here->B1qbd);
            *(ckt->CKTstate0 + here->B1qb) = qbulk +  
                    *(ckt->CKTstate0 + here->B1qbd) +  
                    *(ckt->CKTstate0 + here->B1qbs); 

            /* store small signal parameters */
            if((!(ckt->CKTmode & (MODEAC | MODETRAN))) &&
                    (ckt->CKTmode & MODETRANOP ) && (ckt->CKTmode &
                    MODEUIC ))   goto line850;
            if(ckt->CKTmode & MODEINITSMSIG ) {  
                *(ckt->CKTstate0+here->B1cggb) = cggb;
                *(ckt->CKTstate0+here->B1cgdb) = cgdb;
                *(ckt->CKTstate0+here->B1cgsb) = cgsb;
                *(ckt->CKTstate0+here->B1cbgb) = cbgb;
                *(ckt->CKTstate0+here->B1cbdb) = cbdb;
                *(ckt->CKTstate0+here->B1cbsb) = cbsb;
                *(ckt->CKTstate0+here->B1cdgb) = cdgb;
                *(ckt->CKTstate0+here->B1cddb) = cddb;
                *(ckt->CKTstate0+here->B1cdsb) = cdsb;     
                *(ckt->CKTstate0+here->B1capbd) = capbd;
                *(ckt->CKTstate0+here->B1capbs) = capbs;

                goto line1000;
            }
       
            if(ckt->CKTmode & MODEINITTRAN ) { 
                *(ckt->CKTstate1+here->B1qb) =
                    *(ckt->CKTstate0+here->B1qb) ;
                *(ckt->CKTstate1+here->B1qg) =
                    *(ckt->CKTstate0+here->B1qg) ;
                *(ckt->CKTstate1+here->B1qd) =
                    *(ckt->CKTstate0+here->B1qd) ;
            }
       
       
            error = NIintegrate(ckt,&geq,&ceq,0.0,here->B1qb);
            if(error) return(error);
            error = NIintegrate(ckt,&geq,&ceq,0.0,here->B1qg);
            if(error) return(error);
            error = NIintegrate(ckt,&geq,&ceq,0.0,here->B1qd);
            if(error) return(error);
      
            goto line860;

line850:
            /* initialize to zero charge conductance and current */
            ceqqg = ceqqb = ceqqd = 0.0;
            gcdgb = gcddb = gcdsb = 0.0;
            gcsgb = gcsdb = gcssb = 0.0;
            gcggb = gcgdb = gcgsb = 0.0;
            gcbgb = gcbdb = gcbsb = 0.0;
            goto line900;
            
line860:
            /* evaluate equivalent charge current */
            cqgate = *(ckt->CKTstate0 + here->B1iqg);
            cqbulk = *(ckt->CKTstate0 + here->B1iqb);
            cqdrn = *(ckt->CKTstate0 + here->B1iqd);
            ceqqg = cqgate - gcggb * vgb + gcgdb * vbd + gcgsb * vbs;
            ceqqb = cqbulk - gcbgb * vgb + gcbdb * vbd + gcbsb * vbs;
            ceqqd = cqdrn - gcdgb * vgb + gcddb * vbd + gcdsb * vbs;

            if(ckt->CKTmode & MODEINITTRAN ) {  
                *(ckt->CKTstate1 + here->B1iqb) =  
                    *(ckt->CKTstate0 + here->B1iqb);
                *(ckt->CKTstate1 + here->B1iqg) =  
                    *(ckt->CKTstate0 + here->B1iqg);
                *(ckt->CKTstate1 + here->B1iqd) =  
                    *(ckt->CKTstate0 + here->B1iqd);
            }

            /*
             *  load current vector
             */
line900:
   
            ceqbs = model->B1type * (cbs-(gbs-ckt->CKTgmin)*vbs);
            ceqbd = model->B1type * (cbd-(gbd-ckt->CKTgmin)*vbd);
     
            ceqqg = model->B1type * ceqqg;
            ceqqb = model->B1type * ceqqb;
            ceqqd =  model->B1type * ceqqd;
            if (here->B1mode >= 0) {
                xnrm=1;
                xrev=0;
                cdreq=model->B1type*(cdrain-gds*vds-gm*vgs-gmbs*vbs);
            } else {
                xnrm=0;
                xrev=1;
                cdreq = -(model->B1type)*(cdrain+gds*vds-gm*vgd-gmbs*vbd);
            }

            *(ckt->CKTrhs + here->B1gNode) -= ceqqg;
            *(ckt->CKTrhs + here->B1bNode) -=(ceqbs+ceqbd+ceqqb);
            *(ckt->CKTrhs + here->B1dNodePrime) +=
                    (ceqbd-cdreq-ceqqd);
            *(ckt->CKTrhs + here->B1sNodePrime) += 
                    (cdreq+ceqbs+ceqqg+ceqqb+ceqqd);

            /*
             *  load y matrix
             */

            *(here->B1DdPtr) += (here->B1drainConductance);
            *(here->B1GgPtr) += (gcggb);
            *(here->B1SsPtr) += (here->B1sourceConductance);
            *(here->B1BbPtr) += (gbd+gbs-gcbgb-gcbdb-gcbsb);
            *(here->B1DPdpPtr) += 
                (here->B1drainConductance+gds+gbd+xrev*(gm+gmbs)+gcddb);
            *(here->B1SPspPtr) += 
                (here->B1sourceConductance+gds+gbs+xnrm*(gm+gmbs)+gcssb);
            *(here->B1DdpPtr) += (-here->B1drainConductance);
            *(here->B1GbPtr) += (-gcggb-gcgdb-gcgsb);
            *(here->B1GdpPtr) += (gcgdb);
            *(here->B1GspPtr) += (gcgsb);
            *(here->B1SspPtr) += (-here->B1sourceConductance);
            *(here->B1BgPtr) += (gcbgb);
            *(here->B1BdpPtr) += (-gbd+gcbdb);
            *(here->B1BspPtr) += (-gbs+gcbsb);
            *(here->B1DPdPtr) += (-here->B1drainConductance);
            *(here->B1DPgPtr) += ((xnrm-xrev)*gm+gcdgb);
            *(here->B1DPbPtr) += (-gbd+(xnrm-xrev)*gmbs-gcdgb-gcddb-gcdsb);
            *(here->B1DPspPtr) += (-gds-xnrm*(gm+gmbs)+gcdsb);
            *(here->B1SPgPtr) += (-(xnrm-xrev)*gm+gcsgb);
            *(here->B1SPsPtr) += (-here->B1sourceConductance);
            *(here->B1SPbPtr) += (-gbs-(xnrm-xrev)*gmbs-gcsgb-gcsdb-gcssb);
            *(here->B1SPdpPtr) += (-gds-xrev*(gm+gmbs)+gcsdb);


line1000:  ;

        }   /* End of Mosfet Instance */

    }       /* End of Model Instance */
    return(OK);
}