ifspec.ifs

来自「支持数字元件仿真的SPICE插件」· IFS 代码 · 共 124 行

IFS
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/* $Id: ifspec.tpl,v 1.1 91/03/18 19:01:11 bill Exp $ *//*.......1.........2.........3.........4.........5.........6.........7.........8================================================================================Copyright 1991Georgia Tech Research Corporation, Atlanta, Ga. 30332All Rights ReservedAUTHORS                          30 Sept 1991     Jeffrey P. MurraySUMMARY    This file contains the interface specification file for the     digital d_ram code model.===============================================================================*/ NAME_TABLE:C_Function_Name:       cm_d_ramSpice_Model_Name:      d_ramDescription:           "digital random-access memory"PORT_TABLE:Port_Name:           data_in                data_outDescription:         "data input line(s)"   "data output line(s)"    Direction:           in                     outDefault_Type:        d                      dAllowed_Types:       [d]                    [d]Vector:               yes                    yesVector_Bounds:        [1 -]                  [1 -]Null_Allowed:        no                     noPORT_TABLE:Port_Name:           address                    write_enDescription:         "address input line(s)"    "write enable"Direction:           in                         inDefault_Type:        d                          dAllowed_Types:       [d]                        [d]Vector:               yes                        noVector_Bounds:        [1 -]                      -Null_Allowed:        no                         noPORT_TABLE:Port_Name:           select              Description:         "chip select line(s)" Direction:           in           Default_Type:        d                  Allowed_Types:       [d]                Vector:               yes                 Vector_Bounds:        [1 16]                  Null_Allowed:        no                PARAMETER_TABLE:Parameter_Name:     select_value           	            Description:        "decimal active value for select line comparison"     Data_Type:          int              Default_Value:      1              Limits:             [0 32767]         Vector:              no                  Vector_Bounds:       -                   Null_Allowed:       yes               PARAMETER_TABLE:Parameter_Name:     icDescription:        "initial bit state @ DC"Data_Type:          intDefault_Value:      2Limits:             [0 2]      Vector:              noVector_Bounds:       -Null_Allowed:       yesPARAMETER_TABLE:Parameter_Name:     read_delay         	Description:        "read delay from address/select/write_en active"Data_Type:          real                  Default_Value:      100.0e-9               Limits:             [1e-12 -]                 Vector:              no                 Vector_Bounds:       -                  Null_Allowed:       yes                  PARAMETER_TABLE:Parameter_Name:     data_load                   address_loadDescription:        "data_in load value (F)"    "address line load value (F)"Data_Type:          real                        real      Default_Value:      1.0e-12                     1.0e-12   Limits:             -                           -          Vector:              no                          no   Vector_Bounds:       -                           -  Null_Allowed:       yes                         yes       PARAMETER_TABLE:Parameter_Name:     select_load             enable_loadDescription:        "select load value (F)" "enable line load value (F)"Data_Type:          real                    real      Default_Value:      1.0e-12                 1.0e-12   Limits:             -                       -          Vector:              no                      no   Vector_Bounds:       -                       -  Null_Allowed:       yes                     yes       

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