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📄 btldr_pi.c

📁 Embeded bootloader (rrload by ridgerun) for TI linux based platform v5.36
💻 C
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		 NULL);#endif    }    // Next, Do we have a filesystem stored?    comp = c_FILESYS;    flash_read(comp_flash_info[comp].START_OFFSET,               (unsigned short *) &magicn,               sizeof(MAGIC_t),               NULL);    if (comp_flash_info[comp].MAGIC_NUM == magicn) {      comp_info[comp].is_FLASH_resident = TRUE;#if BSPCONF_BTLDR_MEMMAP_DEBUG      flash_read(comp_flash_info[comp].START_OFFSET + sizeof(MAGIC_t),		 (unsigned short *) &(comp_info[comp].fheader),		 sizeof(FHEADER_t),		 NULL);#endif    }  }  free_memory_start = (char *) GUNZIP_MALLOC_START;  free_memory_size = GUNZIP_MALLOC_SIZE; // 1 Mbyte}/****************************** Routine: Description: Returns true if addr is in flash memory address space ******************************/int btldr_AddressIsInFlashSpace(unsigned int addr){  return( (addr >= BSPCONF_FLASH_BASE + comp_flash_info[c_BOOTLDR].START_OFFSET) &&          (addr <= BSPCONF_FLASH_BASE + comp_flash_info[c_FILESYS].END_OFFSET) );}/****************************** Routine: Description:   Returns true if size is known, false otherwise           Returns location in flash were component is stored ******************************/int  get_flash_comp_addresses(comp_t c,			      unsigned int *start_addr,			      unsigned int *size,			      unsigned int *max_addr){  *start_addr=(unsigned int)(comp_flash_info[c].START_OFFSET) +               (unsigned int)(BSPCONF_FLASH_BASE);  *max_addr=  (unsigned int)(comp_flash_info[c].END_OFFSET)   +              (unsigned int)(BSPCONF_FLASH_BASE);  if (comp_info[c].is_FLASH_resident) {    *size=comp_info[c].fheader.num_bytes;    return(true);  } else {    return(false);  }}/****************************** Routine: Description:   Returns true if component resides in sdram, false otherwise           Returns location in sdram were component is stored ******************************/int  get_sdram_comp_addresses(comp_t c,			      unsigned int *start_addr,			      unsigned int *size,			      unsigned int *entry_addr){  if (comp_info[c].is_FLASH_resident) {    *start_addr=comp_info[c].fheader.load_addr;    *size      =comp_info[c].fheader.num_bytes;    *entry_addr=comp_info[c].fheader.entry_addr;    return(true);  }  return(false);}/****************************** Routine: Description:   Call Back routine used when doing I/O port component loads ******************************/static void put_val_at_addr(unsigned short *vaddr, unsigned short val){  // Since this callback is used during I/O port loads  // which might be processing an incoming XIP compontent  // we'll have to check the address as appropriate.  if (io_AddressIsInFlashSpace((unsigned int)vaddr)) {    // The load is going directly to flash. XIP components.    flash_write(((unsigned int)(vaddr)-BSPCONF_FLASH_BASE),&val,2,NULL);  }  else {    *vaddr = val;  }  if (prog_strobe) {    // Let client update whatever UI progress    // meter they might be displaying.    if (strobe_cnt++ == strobe_delta) {      strobe_cnt = 0;      (*prog_strobe)();    }      }}#if !(defined(DSC21) || defined(DSC24) || defined(DSC25) || \      defined(DM270) || defined(DM310) || defined(C5471))/****************************** Routine: Description:   Call Back routine used when moving data from flash to ram. ******************************/static void put_val_at_addr_2(unsigned short *vaddr, unsigned short val){  // Since this callback is only used for moving data from  // flash to ram there is no need to make the XIP check  // that the put_val_at_addr() callback routine needs.  *vaddr = val;  if (prog_strobe) {    // Let client update whatever UI progress    // meter they might be displaying.    if (strobe_cnt++ == strobe_delta) {      strobe_cnt = 0;      (*prog_strobe)();    }      }}#endif/****************************** Routine: Description: ******************************/static void get_val_from_addr(unsigned short *vaddr, unsigned short *val){  *val = *vaddr;  // printf("0x%x: 0x%x\n",vaddr,*val); // *debug* temp.  if (prog_strobe) {    // Let client update whatever UI progress    // meter they might be displaying.    if (strobe_cnt++ == strobe_delta) {      strobe_cnt = 0;      (*prog_strobe)();    }      }}/****************************** Routine: Description: returns non-zero if flash write failure occurred ******************************/static int load(comp_t c,                 src_dest_t s, port_format_t f){  int ret = 0;  int status = LOAD_OK;  int use_header = TRUE;  GetByteCallBack_t GetByteFunc;  switch(s) {    case sd_PARPORT:      GetByteFunc = io_getchar_par;      break;    case sd_SERPORT:      GetByteFunc = io_getchar_ser;      break;    case sd_TFTP:      GetByteFunc = getchar_tftp;      break;    case sd_FLASH:    case sd_SDRAM:    default:      SYSTEM_FATAL("Logic Error");      break;  }  switch(f) {    case f_SREC:      {        srec_RegisterGetByte(GetByteFunc);        srec_RegisterPut(&put_val_at_addr);        status = srec_parse(&(comp_info[c].fheader.load_addr),                            &(comp_info[c].fheader.entry_addr),                            &(comp_info[c].fheader.num_bytes));      }      break;    case f_RR_BINARY:      {        rawbin_RegisterGetByte(GetByteFunc);        rawbin_RegisterPut(&put_val_at_addr);        status = rawbin_parse(&(comp_info[c].fheader.load_addr),                              &(comp_info[c].fheader.entry_addr),                              &(comp_info[c].fheader.num_bytes),			      &use_header);      }      break;    case f_NA:    default:      SYSTEM_FATAL("Logic Error");      break;  }    if (LOAD_OK != status) {    util_printf("ERROR: parse status = %d: Aborting.\n",status);  }  else {    // Check to see if the component will fit into the     // reserved flash space    if (comp_info[c].fheader.num_bytes >         (comp_flash_info[c].END_OFFSET - comp_flash_info[c].START_OFFSET)) {	  util_printf("\nWARNING: downloaded component is larger\n");	  util_printf("than the reserved flash space.\n\n");    }    // Next,    // Where did that load just go? ram or flash? Remember that    // components intended to run in-place in flash will be loaded    // directly into the flash memory map space (XIP). If so, we assume the    // loaded image was constructed to load to the very specific flash    // locations we've documented for kernel and filesystem XIP component    // images. Also, we assume that prior to the load the user had    // first erased that area of flash. For more information look at    // XIP discussions in project doc.    if (io_AddressIsInFlashSpace(comp_info[c].fheader.load_addr) &&	use_header) {      // XIP component image just loaded to flash. Now need to add       // the magic num and info header that goes with it.      flash_flush();      ret |= flash_write(comp_flash_info[c].START_OFFSET,                  (unsigned short *) &(comp_flash_info[c].MAGIC_NUM),                  sizeof(MAGIC_t),                  NULL);      ret |= flash_write(comp_flash_info[c].START_OFFSET + sizeof(MAGIC_t),                  (unsigned short *) &(comp_info[c].fheader),                  sizeof(FHEADER_t),                  NULL);      flash_flush();    }    if (io_AddressIsInFlashSpace(comp_info[c].fheader.load_addr)) {      comp_info[c].is_FLASH_resident = TRUE;    }    else {      comp_info[c].is_SDRAM_resident = TRUE;     }  }    return ret;}#if defined(DSC21)static void dma_flash_read(unsigned int offset,  // Of flash.                           unsigned int dest, // Destination buffer                           unsigned int num_bytes){        u32 frm_addr,to_addr,count;                    volatile dma_reg_t *dma_regs;         //util_printf("\nin dma copy\n");        //util_printf("%X %X %X\n", offset, dest, num_bytes);        dma_regs = (dma_reg_t *) 0x30B80;        frm_addr = offset;        to_addr = dest;        to_addr -= 0x8000000;  // Pull offset from SDRAM base.        count = num_bytes;        dma_regs->mode = 2; // Set mode for SDRAM to FLASH.        while (count > 0)        {                //util_printf("From is %X\n",frm_addr);                dma_regs->src_hi = (frm_addr>>16)&0x7F;                dma_regs->src_lo = (frm_addr & 0xFFFF);                //util_printf("To is %X\n",to_addr);                dma_regs->dest_hi = (to_addr>>16)&0x7FF;                dma_regs->dest_lo = (to_addr & 0xFFFF);                //util_printf("Count is %X\n", count);                if (count < MAX_DMA_SIZE)                {                        dma_regs->count = count;                        dma_regs->control = 1;  //Trigger DMA.                        count = 0;                } else                {                        dma_regs->count = MAX_DMA_SIZE;                        dma_regs->control = 1;  //Trigger DMA.                        count -= MAX_DMA_SIZE;                        frm_addr += MAX_DMA_SIZE;                        to_addr += MAX_DMA_SIZE;                }                while(dma_regs->status & 0x8000); //delay till dma done.        }}// endif // DSC21#elif defined(DSC24)static void dma_flash_read(unsigned int offset,  // Of flash.                           unsigned int dest, // Destination buffer                           unsigned int num_bytes){        u32 frm_addr,to_addr,count;        volatile dma_reg_t *dma_regs = (dma_reg_t *) 0x30a18;        //util_printf("\nin dma copy\n");        dma_regs = (dma_reg_t *) 0x30a18;        frm_addr = offset;        to_addr = dest;        to_addr -= 0x900000;  // Pull offset from SDRAM base.        count = num_bytes;        dma_regs->mode = 5; // Set mode for SDRAM and FLASH.        while (count > 0)        {                //util_printf("From is %X\n",frm_addr);                dma_regs->src_hi = (frm_addr>>16)&0x3ff;                dma_regs->src_lo = (frm_addr & 0xffff);                //util_printf("To is %X\n",to_addr);                dma_regs->dest_hi = (to_addr>>16)&0x3ff;                dma_regs->dest_lo = (to_addr & 0xffff);                //util_printf("Count is %X\n", count);                if (count < MAX_DMA_SIZE)                {                        dma_regs->count = count;                        dma_regs->control = 1;  //Trigger DMA.                        count = 0;                } else                {                        dma_regs->count = MAX_DMA_SIZE;                        dma_regs->control = 1;  //Trigger DMA.                        count -= MAX_DMA_SIZE;                        frm_addr += MAX_DMA_SIZE;                        to_addr += MAX_DMA_SIZE;                }                while(dma_regs->control); //delay till dma done.        }}// endif // DSC24#elif OMAP1510typedef struct {        u16 csdp;      // channel s/d parameters -- working set (current transfer)        u16 ccr;       // channel control -- working set        u16 cicr;      // channel interrupt control -- working set        u16 csr;       // channel status -- working set        u16 cssa_l;    // source lower bits -- programming set (next transfer)        u16 cssa_u;    // source upper bits -- programming set        u16 cdsa_l;    // destn lower bits -- programming set        u16 cdsa_u;    // destn upper bits -- programming set        u16 cen;       // channel element number -- programming set        u16 cfn;       // channel frame number -- programming set        u16 cfi;       // channel frame index -- programming set        u16 cei;       // channel element index -- programming set        u16 cpc;       // channel progress counter        u16 null[19];  // for alignment} dma_regs_t;#define DCSR_ERROR  0x3#define DCCR_EN     (1 << 7)

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