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!_TAG_FILE_FORMAT 2 /extended format; --format=1 will not append ;" to lines/!_TAG_FILE_SORTED 1 /0=unsorted, 1=sorted, 2=foldcase/!_TAG_PROGRAM_AUTHOR Darren Hiebert /dhiebert@users.sourceforge.net/!_TAG_PROGRAM_NAME Exuberant Ctags //!_TAG_PROGRAM_URL http://ctags.sourceforge.net /official site/!_TAG_PROGRAM_VERSION 5.4 //ACDC1 pmu.h 57;" dACK tftp.c /^ tftp_ACK_datagram_t ACK;$/;" m union: file:ADCC1 pmu.h 52;" dADCC2 pmu.h 53;" dADCREADY_DETECT pmu.h /^ ADCREADY_DETECT, }; \/\/INT3 REG$/;" eADCS1 pmu.h 54;" dADCS2 pmu.h 55;" dADCS3 pmu.h 56;" dADD_PORT ether_cs8900.c 55;" d file:AF_REGISTER_BASE dm270-registers.h 39;" dALARM_DETECT pmu.h /^enum {ONKEY_DETECT= 1,ONKEY1S_DETECT,EXTONF_DETECT,ALARM_DETECT,\/\/INT1 REG.$/;" eAMD_AM29DL164DT memconfig.h 22;" dAMD_AM29L640Dx2 memconfig.h 23;" dAR Makefile /^AR = $(PREFIX)ar$/;" mARM_CLK dm270-registers.h 183;" dARM_CLK dm270-registers.h 185;" dARM_MODE_SVC head_dm270.S /^#define ARM_MODE_SVC 0x13$/;" dARM_MODE_SVC setup_dm270.S /^#define ARM_MODE_SVC 0x13$/;" dASCII_FLAG decompress.c 1217;" d file:ASCII_FLAG decompress.c 126;" d file:ATM_REGISTER_BASE dm270-registers.h 42;" dAssert decompress.c 138;" d file:Assert decompress.c 145;" d file:BACKSPACE util.c 498;" d file:BASE_OBJECTS Makefile /^BASE_OBJECTS = $(HEAD) $(DECOMP) $(HW_INIT) $(USB) $(VECTOR) \\$/;" mBBCC pmu.h 51;" dBITCLR0 i2c.h 38;" dBITCLR1 i2c.h 42;" dBITCLR2 i2c.h 46;" dBITCLR_BASE rr_i2c.c 22;" d file:BITSET0 i2c.h 37;" dBITSET1 i2c.h 41;" dBITSET2 i2c.h 45;" dBITSET_BASE rr_i2c.c 21;" d file:BLOCK_ERASE_CODE flash_intel.c 392;" d file:BLOCK_ERASE_CODE flash_intel.c 395;" d file:BMAX decompress.c 428;" d file:BOOL i2c.h 49;" dBOOT_TIMEOUT btldr_ui.c 1733;" d file:BSPCONF_BOOT_FROM_FLASH memconfig.h 102;" dBSPCONF_BOOT_FROM_SDRAM memconfig.h 103;" dBSPCONF_BTLDR_CS8900_DEBUG memconfig.h 97;" dBSPCONF_BTLDR_FAST_BOOT memconfig.h 93;" dBSPCONF_BTLDR_FLASH_DEBUG memconfig.h 98;" dBSPCONF_BTLDR_FLASH_OFFSET memconfig.h 48;" dBSPCONF_BTLDR_FLASH_SIZE memconfig.h 49;" dBSPCONF_BTLDR_FLASH_START memconfig.h 47;" dBSPCONF_BTLDR_MEMMAP_DEBUG memconfig.h 96;" dBSPCONF_BTLDR_MEMORY_DEBUG memconfig.h 95;" dBSPCONF_BTLDR_NO_MENUS memconfig.h 94;" dBSPCONF_BTLDR_SDRAM_END memconfig.h 81;" dBSPCONF_BTLDR_SDRAM_START memconfig.h 80;" dBSPCONF_DM270_INGENIENT memconfig.h 8;" dBSPCONF_DM270_INGENIENT_MP4900 memconfig.h 9;" dBSPCONF_DRAM_BASE memconfig.h 117;" dBSPCONF_DRAM_SIZE memconfig.h 118;" dBSPCONF_ETHERNET_BASE memconfig.h 122;" dBSPCONF_ETHERNET_PHY memconfig.h 134;" dBSPCONF_ETHERNET_TYPE memconfig.h 129;" dBSPCONF_FILESYS_SIZE memconfig.h 112;" dBSPCONF_FILESYS_START memconfig.h 111;" dBSPCONF_FLASH2_BASE memconfig.h 31;" dBSPCONF_FLASH2_SIZE memconfig.h 34;" dBSPCONF_FLASH2_TYPE memconfig.h 28;" dBSPCONF_FLASH_BASE memconfig.h 30;" dBSPCONF_FLASH_FS memconfig.h 110;" dBSPCONF_FLASH_OFFSET memconfig.h 45;" dBSPCONF_FLASH_SIZE memconfig.h 33;" dBSPCONF_FLASH_TYPE memconfig.h 27;" dBSPCONF_FRAMEBUFFER_SDRAM_START memconfig.h 82;" dBSPCONF_FS_COMPRESSED memconfig.h 41;" dBSPCONF_FS_FLASH_OFFSET memconfig.h 60;" dBSPCONF_FS_FLASH_SIZE memconfig.h 61;" dBSPCONF_FS_FLASH_START memconfig.h 59;" dBSPCONF_FS_SDRAM_START memconfig.h 83;" dBSPCONF_IRAM_BASE memconfig.h 89;" dBSPCONF_KERNEL_COMPRESSED memconfig.h 40;" dBSPCONF_KERNEL_FLASH_OFFSET memconfig.h 56;" dBSPCONF_KERNEL_FLASH_SIZE memconfig.h 57;" dBSPCONF_KERNEL_FLASH_START memconfig.h 55;" dBSPCONF_KERNEL_IMAGE_START memconfig.h 104;" dBSPCONF_KERNEL_PARMS memconfig.h 106;" dBSPCONF_KERNEL_SDRAM_START memconfig.h 84;" dBSPCONF_KERNEL_STACK memconfig.h 105;" dBSPCONF_NETWORK_SOURCE_IP memconfig.h 145;" dBSPCONF_NETWORK_SOURCE_MAC memconfig.h 147;" dBSPCONF_NETWORK_SOURCE_NAME memconfig.h 146;" dBSPCONF_NETWORK_TARGET_BCAST memconfig.h 142;" dBSPCONF_NETWORK_TARGET_GW_IP memconfig.h 143;" dBSPCONF_NETWORK_TARGET_IP memconfig.h 138;" dBSPCONF_NETWORK_TARGET_MAC memconfig.h 140;" dBSPCONF_NETWORK_TARGET_MASK memconfig.h 141;" dBSPCONF_NETWORK_TARGET_NAME memconfig.h 139;" dBSPCONF_NETWORK_TARGET_NET_IP memconfig.h 144;" dBSPCONF_NFLASH_PARTS memconfig.h 14;" dBSPCONF_PARAMS_FLASH_OFFSET memconfig.h 52;" dBSPCONF_PARAMS_FLASH_SIZE memconfig.h 53;" dBSPCONF_PARAMS_FLASH_START memconfig.h 51;" dBSPCONF_RAMDISK_SIZE memconfig.h 113;" dBSPCONF_SDRAM_BASE memconfig.h 75;" dBSPCONF_SDRAM_SIZE memconfig.h 76;" dBSPCONF_SDRAM_TYPE memconfig.h 73;" dBSPCONF_USE_IRAM memconfig.h 88;" dBSPCONF_USE_MMU memconfig.h 10;" dBTLDR_PI_H btldr_pi.h 43;" dBUFFCONF ether_cs8900.c 62;" d file:BUSCNTRL ether_cs8900.c 65;" d file:BUSC_REGISTER_BASE dm270-registers.h 34;" dBUSSTATUS ether_cs8900.c 69;" d file:BUSY_BIT_POS flash_intel.c 330;" d file:BUSY_BIT_POS flash_intel.c 345;" d file:BVMC pmu.h 58;" dBYPOFF_DATA dm270-registers.h 198;" dBYPON_DATA dm270-registers.h 194;" dCACHE Makefile /^ CACHE = cache_null.o$/;" mCACHE Makefile /^ CACHE = cache_dm270.o$/;" mCACHE Makefile /^ CACHE = cache_null.o$/;" mCACHE_H cache.h 35;" dCADENUX_DM270_PMP dm270-registers.h 9;" dCC Makefile /^CC = $(PREFIX)gcc$/;" mCCDC_REGISTER_BASE dm270-registers.h 30;" dCFI_CMDSET_2 memconfig.h 26;" dCFI_END_ADDR flash.h 52;" dCFI_START_ADDR flash.h 51;" dCFLAGS Makefile /^CFLAGS = -MD -g -Wall -D$(NetRate) $(KERN)$/;" mCHGINS_DETECT pmu.h /^ CHGINS_DETECT,CHGRM_DETECT, \/\/INT2 REG$/;" eCHGRM_DETECT pmu.h /^ CHGINS_DETECT,CHGRM_DETECT, \/\/INT2 REG$/;" eCLEAR_CODE flash_intel.c 283;" d file:CLEAR_CODE flash_intel.c 288;" d file:CLKC_DATA dm270-registers.h 153;" dCLKC_DATA dm270-registers.h 164;" dCLOCKC_BYP dm270-registers.h 110;" dCLOCKC_CLKC dm270-registers.h 107;" dCLOCKC_CTST dm270-registers.h 112;" dCLOCKC_DIV dm270-registers.h 109;" dCLOCKC_LPCTL0 dm270-registers.h 116;" dCLOCKC_LPCTL1 dm270-registers.h 117;" dCLOCKC_MMCLK dm270-registers.h 111;" dCLOCKC_MOD0 dm270-registers.h 113;" dCLOCKC_MOD1 dm270-registers.h 114;" dCLOCKC_MOD2 dm270-registers.h 115;" dCLOCKC_O0DIV dm270-registers.h 119;" dCLOCKC_O1DIV dm270-registers.h 120;" dCLOCKC_O2DIV dm270-registers.h 121;" dCLOCKC_OSEL dm270-registers.h 118;" dCLOCKC_PLLA dm270-registers.h 105;" dCLOCKC_PLLB dm270-registers.h 106;" dCLOCKC_PWM0C dm270-registers.h 122;" dCLOCKC_PWM0H dm270-registers.h 123;" dCLOCKC_PWM1C dm270-registers.h 124;" dCLOCKC_PWM1H dm270-registers.h 125;" dCLOCKC_REGISTER_BASE dm270-registers.h 33;" dCLOCKC_SEL dm270-registers.h 108;" dCMDLINEOVERRIDE hwinit_dm270.S /^CMDLINEOVERRIDE: .word 0x01000000$/;" lCMDMAX btldr_pi.c 246;" d file:CMDMAX btldr_ui.c 92;" d file:CMDMAX flash_toshiba.c 42;" d file:CMD_FIELD btldr_ui.c 87;" d file:COMMENT decompress.c 1221;" d file:COMMENT decompress.c 130;" d file:CONSOLE_TYPE io_dm270.c /^static int CONSOLE_TYPE; \/\/ 0 = serial port device$/;" v file:CONTINUATION decompress.c 1218;" d file:CONTINUATION decompress.c 127;" d file:CON_FIELD btldr_ui.c 90;" d file:CRC_VALUE decompress.c 1173;" d file:CS8900_DEBUG_CHAR btldr_ui.c 62;" d file:CS8900_DEBUG_CHAR btldr_ui.c 64;" d file:CS8900_DEBUG_CHAR btldr_ui.c 68;" d file:CS8900_DEBUG_CHAR btldr_ui.c 70;" d file:Cached_Short flash_intel.c /^static unsigned short Cached_Short;$/;" v file:Cached_Short_valid flash_intel.c /^static unsigned short Cached_Short_valid;$/;" v file:Cached_flash_addr flash_intel.c /^static unsigned long *Cached_flash_addr;$/;" v file:D1REGC1 pmu.h 42;" dD2REGC1 pmu.h 43;" dD3REGC1 pmu.h 44;" dDATA tftp.c /^ tftp_DATA_datagram_t DATA;$/;" m union: file:DATA_PORT ether_cs8900.c 56;" d file:DCCR_EN btldr_pi.c 780;" d file:DCDC1 pmu.h 33;" dDCDC2 pmu.h 34;" dDCDC3 pmu.h 35;" dDCDC4 pmu.h 36;" dDCDEC1 pmu.h 37;" dDCDEC2 pmu.h 38;" dDCSR_ERROR btldr_pi.c 779;" d file:DCUDC1 pmu.h 39;" dDCUDC2 pmu.h 40;" dDEBG decompress.c 177;" d file:DEBG1 decompress.c 178;" d file:DEBUG Makefile /^DEBUG=$/;" mDECOMP Makefile /^DECOMP = $/;" mDECOMP Makefile /^DECOMP = decompress.o$/;" mDECOMPRESS_H decompress.h 2;" dDEL util.c 499;" d file:DEND_PROG btldr_pi.c 782;" d file:DEV_ID_CODE flash_intel.c 230;" d file:DFIFO_FLUSH btldr_pi.c 781;" d file:DFRAME btldr_pi.c 785;" d file:DIR0 i2c.h 36;" dDIR1 i2c.h 40;" dDIR2 i2c.h 44;" dDIR_BASE rr_i2c.c 23;" d file:DIV dm270-registers.h 180;" dDIV_DATA dm270-registers.h 158;" dDIV_DATA dm270-registers.h 169;" dDM270_ICACHE_ICAMODE dm270-registers.h 595;" dDM270_ICAMODE_ICACLR dm270-registers.h 601;" dDM270_ICAMODE_ICADIS dm270-registers.h 600;" dDM270_ICAMODE_ICAENB dm270-registers.h 599;" dDM270_ICAMODE_REQ4W dm270-registers.h 602;" dDREPEAT btldr_pi.c 784;" d file:DRV_H Makefile /^DRV_H = sdram.h flash.h io.h ether.h$/;" mDRV_OBJECTS Makefile /^DRV_OBJECTS = $(SDRAM) $(FLASH) $(IO) $(ETHER) $(OSD)$/;" mDSC25_REVR btldr_ui.c 104;" d file:DSPC_REGISTER_BASE dm270-registers.h 28;" dDSP_HPIB_CTL dm270-registers.h 335;" dDSP_HPIB_STAT dm270-registers.h 336;" dDSP_INT0_DATA dm270-registers.h 342;" dDSP_NORMAL_DATA dm270-registers.h 341;" dDSP_RESET_DATA dm270-registers.h 340;" dDSYNC_SET btldr_pi.c 783;" d file:DUMPBITS decompress.c 387;" d file:EEPROM_ADDR pmu.c 27;" d file:EEPROM_DATA_SUBADDR pmu.c 28;" d file:EMEMC_REGISTER_BASE dm270-registers.h 36;" dENCRYPTED decompress.c 1222;" d file:ENCRYPTED decompress.c 131;" d file:END_OFFSET btldr_pi.c /^ unsigned int END_OFFSET;$/;" m struct: file:ERASE_CONFIRM_CODE flash_intel.c 393;" d file:ERASE_CONFIRM_CODE flash_intel.c 396;" d file:ERASE_STATUS_BIT_POS flash_intel.c 363;" d file:ERROR tftp.c /^ tftp_ERROR_datagram_t ERROR;$/;" m union: file:ETHER Makefile /^ ETHER = ether_c5471.o$/;" mETHER Makefile /^ ETHER = ether_cs8900.o$/;" mETHER Makefile /^ ETHER = ether_smc91c111.o$/;" mETHER Makefile /^ ETHER = ether_smc91xxx.o$/;" mETHER Makefile /^ ETHER = ether_unknown.o$/;" mETHERNET_PHY_AC101L memconfig.h 133;" dETHERNET_PHY_LU3X31T_T64 memconfig.h 132;" dETHERNET_PHY_UNKNOWN memconfig.h 131;" dETHERNET_TYPE_CS8900 memconfig.h 126;" dETHERNET_TYPE_NONE memconfig.h 124;" dETHERNET_TYPE_SMC9194 memconfig.h 127;" dETHERNET_TYPE_SMC91C111 memconfig.h 128;" dETHERNET_TYPE_UNKNOWN memconfig.h 125;" dETHER_H ether.h 43;" dEXBC_BUSCTRL dm270-registers.h 357;" dEXBC_BUSCTRL_DATA dm270-registers.h 430;" dEXBC_BUSCTRL_DATA dm270-registers.h 432;" dEXBC_BUSINTEN dm270-registers.h 362;" dEXBC_BUSINTEN_DATA dm270-registers.h 441;" dEXBC_BUSRLS dm270-registers.h 358;" dEXBC_BUSRLS_DATA dm270-registers.h 433;" dEXBC_BUSSTS dm270-registers.h 363;" dEXBC_BUSSTS_DATA dm270-registers.h 444;" dEXBC_BUSSTS_DATA dm270-registers.h 446;" dEXBC_BUSWAITMD dm270-registers.h 364;" dEXBC_BUSWAITMD_DATA dm270-registers.h 449;" dEXBC_CFCTRL1 dm270-registers.h 359;" d⌨️ 快捷键说明
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