eth400.a51

DS80C400以太网物理链路层配置

;****************************************************************************
;*
;*  Copyright (C) 2003-2004 Dallas Semiconductor Corporation. 
;*  All rights Reserved. Printed in U.S.A.
;*  This software is protected by copyright laws of
;*  the United States and of foreign countries.
;*  This material may also be protected by patent laws of the United States 
;*  and of foreign countries.
;*  This software is furnished under a license agreement and/or a
;*  nondisclosure agreement and may only be used or copied in ACCordance
;*  with the terms of those agreements.
;*  The mere transfer of this software does not imply any licenses
;*  of trade secrets, proprietary technology, copyrights, patents,
;*  trademarks, maskwork rights, or any other form of intellectual
;*  property whatsoever. Dallas Semiconductor retains all ownership rights.
;*
;*     Module Name: DS80C400 Ethernet Driver
;*
;*        Filename: eth400.a51
;*
;****************************************************************************

; 24 bit mode (Keil AX51)
$MC

; For Keil AX51 also include dallas.inc
; $INCLUDE (dallas.inc)
$INCLUDE (ds80c400.inc)
$INCLUDE (eth400.inc)
$INCLUDE (macros.inc)
$INCLUDE (changeme.inc)


;****************************************************************************
;*
;* Function Name: ETH_ReadCSR
;*
;*   Description: Read from specified register. 
;*
;*      Input(s): a -> register address 
;*
;*    Outputs(s): r3:r2:r1:r0 -> 32 bit register byte value 
;* 
;****************************************************************************
ETH_ReadCSR:
           push  EIE
           clr   EIE.5
           mov   CSRA, a                ; Load CSRA SFR with the LSB of the 
                                        ; 16-bit address of the targeted CSR
           anl   BCUC, #0f0h            ; Clear BCUC command bits
           orl   BCUC, #BCU_READ_CSR    ; Write read CSR command to BCUC SFR

           push  ACC
eth_readcsr_busy:                       ; Wait until Busy bit in BCUC SFR is reset
           mov   a, BCUC                ; Move to ACC since BCUC is not bit cap.
           jb    ACC.7, eth_readcsr_busy
           pop   ACC

           mov   r3, CSRD               ; Read CSRD SFR for MSB of 32 bit data 
           mov   r2, CSRD
           mov   r1, CSRD
           mov   r0, CSRD               ; LSB
           pop   EIE
           ret


;****************************************************************************
;*
;* Function Name: ETH_WriteCSR
;*
;*   Description: Write to specified register.
;*
;*      Input(s): a -> register address 
;*                r3:r2:r1:r0 -> 32 bit value
;*
;*    Outputs(s): N/A
;*
;****************************************************************************
ETH_WriteCSR:
           push  EIE
           clr   EIE.5
           mov   CSRD, r3               ; Write CSRD SFR for MSB of 32 bit data 
           mov   CSRD, r2
           mov   CSRD, r1
           mov   CSRD, r0               ; LSB

           mov   CSRA, a                ; Load CSRA SFR with the LSB of the 
                                        ; 16-bit address of the targeted CSR
           anl   BCUC, #0f0h            ; Clear bcuc command bits 0-3
           orl   BCUC, #BCU_WRITE_CSR   ; Write write CSR command to bcuc SFR

           push  ACC
eth_writecsr_busy:                      ; Wait until Busy bit in BCUC SFR is reset
           mov   a, BCUC
           jb    ACC.7, eth_writecsr_busy
           pop   ACC
           pop   EIE
           ret


;****************************************************************************
;*
;* Function Name: ETH_LoadEthernetAddress
;*
;*   Description: Load the 48 bit ethernet address into the controller. 
;*
;*      Input(s): dptr0 -> pointer to the Ethernet address (big-endian)
;                          for example 00 60 01 02 03 04
;*
;*    Outputs(s): N/A
;*
;****************************************************************************
ETH_LoadEthernetAddress:
           movx  a, @dptr
           mov   r0, a
           inc   dptr
           movx  a, @dptr
           mov   r1, a
           inc   dptr
           movx  a, @dptr
           mov   r2, a
           inc   dptr
           movx  a, @dptr
           mov   r3, a
           inc   dptr

           mov   a, #CSR_MAC_LO
           acall ETH_WriteCSR

           movx  a, @dptr
           mov   r0, a
           inc   dptr
           movx  a, @dptr
           mov   r1, a
           clr   a
           mov   r2, a
           mov   r3, a

           mov   a, #CSR_MAC_HI
           acall ETH_WriteCSR
           ret


;****************************************************************************
;*
;* Function Name: ETH_EnableTransceiver
;*
;*   Description: Enable receiver and transmitter for Ethernet controller. 
;*
;*      Input(s): N/A
;*
;*    Outputs(s): N/A
;*
;****************************************************************************
ETH_EnableTransceiver:
           push  EIE
           clr   EIE.5

           ; First, disable transmitter and receiver (full duplex bit is
           ; not settable if they are on)
           clr   a
           mov   r3, a
           mov   r2, a
           mov   r1, a
           mov   r0, a
           mov   a, #CSR_MAC_CTRL
           acall ETH_WriteCSR

           ; Set Ethernet buffer sizes
           TIMEDACCESS
           mov   ebs, #ETH_TRANSMIT_PAGE ; Also clears the flush filter failed bit
           mov   r3, #00h               ; Select non-byte swap mode
           mov   dptr, #ETH_DUPLEX_STATUS
           movx  a, @dptr
           swap  a                      ; Move bit to position 4 (20:F)
           jnz   eth_et_fullduplex
           orl   a, #80h                ; Disable receive own (23:DRO)
eth_et_fullduplex:
           orl   a, #08h                ; Pass all multicast (19:PM)
           mov   r2, a                  ; Set duplex mode ACCording to PHY detection
           mov   r1, #10h               ; Perfect filtering of multicast, 
                                        ; late collision control, no auto pad strip
           mov   r0, #0ch               ; Block-off limit 10, no deferral check, 
                                        ; enable transmitter and receiver
           mov   a, #CSR_MAC_CTRL
           acall ETH_WriteCSR

           pop   EIE
           ret


;****************************************************************************
;*
;* Function Name: ETH_Flush
;*
;*   Description: Release all resources. 
;*
;*      Input(s): N/A
;*
;*    Outputs(s): N/A
;* 
;****************************************************************************
ETH_Flush:
           anl   BCUC, #0f0h		; Clear bcuc command bits
           orl   BCUC, #BCU_INV_CURR	; Write release command to bcuc SFR
           ret


;****************************************************************************
;*
;* Function Name: ETH_Transmit
;*
;*   Description: Transmit the raw Ethernet packet currently in the
;*                Ethernet send buffer
;*
;*      Input(s): r5:r4 = total packet length in bytes
;*
;*    Outputs(s): N/A
;*
;****************************************************************************
ETH_Transmit:
           ; Ethernet frame is in transmit buffer (Starting at 
           ; page offset = 4). Byte count is in r5:r4

           ; Load MSB of byte count to BCUD SFR
           mov   BCUD, r5
           ; Load LSB of byte count to BCUD SFR
           mov   BCUD, r4

           ; Load starting page address to BCUD SFR
           mov   BCUD, #ETH_TRANSMIT_PAGE
          
           ; XXX Set transmit in progress flag in your software here
           ; XXX so you can avoid interrupting a transmit in progress.
           ; XXX e.g.: setb  ds400_xmit

           ; Write transmit request to BCUC SFR
           anl   BCUC, #0f0h            ; Clear bcuc command bits
           orl   BCUC, #BCU_XMIT        ; Write transmit command to bcuc SFR

           ret


;****************************************************************************
;*
;* Function Name: ETH_Receive
;*
;*   Description: Start unloading the last packet from the
;*                Ethernet controller.
;*
;*      Input(s): N/A
;*
;*    Outputs(s): N/A
;*
;****************************************************************************
ETH_Receive:
           ; Get location of buffer and set dptr0 ACCordingly
           mov   a, BCUD
           anl   a, #1fh         ; we are not interested in the page count
                                 ; so now a contains the starting page number
                                 ; (1 page is 256 bytes)

           mov   dptr, #ETH_RECEIVE_BUFFER ; receive buffer starting address
           mov   B, a            ; "multiply" page by 256 to get byte count
           clr   a
           acall Add_Dptr0_16    ; and add it to receive buffer starting address

           ; dptr0 now points to the receive status word of the packet

           movx  a, @dptr
           inc   dptr
           mov   r2, a                  ; save LSB of frame length

           movx  a, @dptr
           inc   dptr
           mov   r3, a                  ; save this

           ; check runt frame, watchdog time-out