pl110_clcdc.h

windows mobile 6.13 dnldr下载源码

#define CLCDC_VCOMP_INT             0x8 
#define CLCDC_MBERR_INT             0x10

/*
 * Define CLCDC_CONTROL_REG register bit operation field
 */
#define bsLCDControlLcdEn           ((UINT32) 0)
#define bwLCDControlLcdEn           ((UINT32) 1)
#define bsLCDControlLcdBpp          ((UINT32) 1)
#define bwLCDControlLcdBpp          ((UINT32) 3)
#define bsLCDControlLcdBW           ((UINT32) 4)
#define bwLCDControlLcdBW           ((UINT32) 1) 
#define bsLCDControlLcdTFT          ((UINT32) 5)
#define bwLCDControlLcdTFT          ((UINT32) 1)
#define bsLCDControlLcdMono8        ((UINT32) 6)
#define bwLCDControlLcdMono8        ((UINT32) 1)
#define bsLCDControlLcdDual         ((UINT32) 7)
#define bwLCDControlLcdDual         ((UINT32) 1)
#define bsLCDControlLcdBGR          ((UINT32) 8)
#define bwLCDControlLcdBGR          ((UINT32) 1)
#define bsLCDControlLcdBEBO         ((UINT32) 9)
#define bwLCDControlLcdBEBO         ((UINT32) 1)
#define bsLCDControlLcdBEPO         ((UINT32) 10)
#define bwLCDControlLcdBEPO         ((UINT32) 1)
#define bsLCDControlLcdPwr          ((UINT32) 11)
#define bwLCDControlLcdPwr          ((UINT32) 1)
#define bsLCDControlLcdVComp        ((UINT32) 12)
#define bwLCDControlLcdVComp        ((UINT32) 2)
#define bsLCDControlLcdREV0         ((UINT32) 14)
#define bwLCDControlLcdREV0         ((UINT32) 2)
#define bsLCDControlLcdWaterMark    ((UINT32) 16)
#define bwLCDControlLcdWaterMark    ((UINT32) 1)

#define LCDCONTROL_DISABLE_CLCDC    0
#define LCDCONTROL_ENABLE_CLCDC     1

#define LCDCONTROL_LCM_STANDBY    0
#define LCDCONTROL_LCM_RUN        1

/*
 * Define CLCDC_ICR_REG register bit operation field
 */
#define bsLCDICRClearFUFInt       ((UINT32) 1)
#define bwLCDICRClearFUFInt       ((UINT32) 1)
#define bsLCDICRClearLNBUInt      ((UINT32) 2)
#define bwLCDICRClearLNBUInt      ((UINT32) 1)
#define bsLCDICRClearVCOMPInt     ((UINT32) 3)
#define bwLCDICRClearVCOMPInt     ((UINT32) 1)
#define bsLCDICRClearMBErrInt     ((UINT32) 4)
#define bwLCDICRClearMBErrInt     ((UINT32) 1)


/*
 * Define CLCDC driver registers
 */
typedef volatile struct _CLCDC_BASE_REG
{
    UINT32    LCDTIMING_0_R;
    UINT32    LCDTIMING_1_R;
    UINT32    LCDTIMING_2_R;
    UINT32    LCDTIMING_3_R;
    UINT32    LCDUPBASE_R;
    UINT32    LCDLPBASE_R;
    UINT32    LCDIMSC_R;
    UINT32    LCDCONTROL_R;
    UINT32    LCDRIS_R;
    UINT32    LCDMIS_R;
    UINT32    LCDICR_R;
    UINT32    LCDUPCURR_R;
    UINT32    LCDLPCURR_R;
    UINT32    LCDPALETTE_R;

    
}CLCDC_REG, *P_CLCDC_REG;



/************************************************
 * 
 * Define SSP and System Peripheral Controller Related Macro and Structure
 *
 ************************************************/
/*
 *  Define SYS Peripheral Controller2 Backlight
 */
#define SYS_CLOSE_PANEL_BACKLIGHT       0
#define SYS_OPEN_PANEL_BACKLIGHT        1

/*
 *  Define SYS Peripheral Controller2 CS for CLCDC or SSP
 */
#define SYS_CS_FOR_SSP                  0
#define SYS_CS_FOR_CLCDC                1

/*
 *  Define SYS Peripheral Controller2 MUX for CLCDC or EMI
 */
#define SYS_MUX_FOR_EMI                 0
#define SYS_MUX_FOR_CLCDC               1

/*
 *  Define SYS Peripheral Controller2 LCM reset
 */
#define SYS_PANEL_RESET_SET             0
#define SYS_PANEL_RESET_CLEAR           1
#define SYS_PANEL_WR_LOW                0

/*
 *  Define SSP SSPCR
 */
#define SSPCR_0_DSS             ((16 - 1) << 0) // SSP transfer bit width set as 16Bit
#define SSPCR_0_FRF             (0 << 4)        // SSP transfer frame mode set as Motorola SPI 
#define SSPCR_0_SPO             (1 << 6)        // SSP SSPCLKOUT electric level
#define SSPCR_0_SPH             (1 << 7)        // SSP SSPCLKOUT phase
#define SSPCR_0_SCR             (3 << 8)        // SSP Fsspclk/(CPSDVR*(1+SCR))


/*
 *  Define SSP Device Registers Address
 */
#define SSP_CONTROL_0_REG           (SYS_SSP_BASE_ADDRESS + 0x00)
#define SSP_CONTROL_1_REG           (SYS_SSP_BASE_ADDRESS + 0x04)
#define SSP_DATA_REG                (SYS_SSP_BASE_ADDRESS + 0x08)
#define SSP_STATUS_REG              (SYS_SSP_BASE_ADDRESS + 0x0C)
#define SSP_CLK_PS_REG              (SYS_SSP_BASE_ADDRESS + 0x10)
#define SSP_IMSC_REG                (SYS_SSP_BASE_ADDRESS + 0x14)
#define SSP_RIS_REG                 (SYS_SSP_BASE_ADDRESS + 0x18)
#define SSP_MIS_REG                 (SYS_SSP_BASE_ADDRESS + 0x1C)
#define SSP_IC_REG                  (SYS_SSP_BASE_ADDRESS + 0x20)
#define SSP_DMAC_REG                (SYS_SSP_BASE_ADDRESS + 0x24)


/*
 * Define SSP SSP_CONTROL_1_REG enum
 */
typedef enum
{
    SSP_DEV_DISABLE = 0,
    SSP_DEV_ENABLE
}SSP_DEV_EN_CTRL;

/*
 * Define SSP_CONTROL_1 register bit operation field
 */
#define bsSSPControl1Sse            ((UINT32) 1)
#define bwSSPControl1Sse            ((UINT32) 1)

/*
 * Define SSP_STATUS register bit operation field
 */
#define SSP_TX_FIFO_NOT_EMPTY           (1 << 0)

/*
 * Define SSP driver registers
 */
typedef volatile struct _SSP_BASE_REG
{
    UINT32     SSP_CONTROL_0;
    UINT32     SSP_CONTROL_1;
    UINT32     SSP_DATA;  
    UINT32     SSP_STATUS; 
    UINT32     SSP_CLK_PS;
    UINT32     SSP_IMSC;
    UINT32     SSP_RIS;
    UINT32     SSP_MIS;
    UINT32     SSP_IC_R;
    UINT32     SSP_DMAC;
}SSP_REG, *P_SSP_REG;


/*
 * Define SYS_PERIPH_CONTROL_2 register bit operation field
 */
#define bsPeriphCtrl2LcdRS          ((UINT32) 1)
#define bwPeriphCtrl2LcdRS          ((UINT32) 1)
#define bsPeriphCtrl2LcdReset       ((UINT32) 2)
#define bwPeriphCtrl2LcdReset       ((UINT32) 1)
#define bsPeriphCtrl2LcdPwm         ((UINT32) 3)
#define bwPeriphCtrl2LcdPwm         ((UINT32) 1)
#define bsPeriphCtrl2LcdEmiClcdc    ((UINT32) 5)
#define bwPeriphCtrl2LcdEmiClcdc    ((UINT32) 1)
#define bsPeriphCtrl2LcdSspClcdc    ((UINT32) 6)
#define bwPeriphCtrl2LcdSspClcdc    ((UINT32) 1)
#define bsPeriphCtrl2LcdWRn         ((UINT32) 9)
#define bwPeriphCtrl2LcdWRn         ((UINT32) 1)


/*
 *  Define System Peripheral Control Registers Address
 */
#define SYS_PERIPHERAL_CTRL_0_REG   (SYS_CONTROL_BASE_ADDRESS + 0x00)
#define SYS_PERIPHERAL_CTRL_1_REG   (SYS_CONTROL_BASE_ADDRESS + 0x04)
#define SYS_PERIPHERAL_CTRL_2_REG   (SYS_CONTROL_BASE_ADDRESS + 0x08)


/*
 *  Define System Peripheral Control Registers
 */
typedef volatile struct _SYS_CTRL_BASE_REG
{
    UINT32     SYS_CONTROL_0_R;
    UINT32     SYS_CONTROL_1_R;
    UINT32     SYS_CONTROL_2_R;  

}SYS_CTRL_REG, *P_SYS_CTRL_REG;


/************************************************
 * 
 * Define LCD Related Macro and Structure
 *
 ************************************************/
/*
 * Define CLCDC initialize caller 
 */
#define DISPLAY_HW_INIT_CALLER_GWES     0
#define DISPLAY_HW_INIT_CALLER_IPL      1


typedef struct RECT_Tag
{
	UINT32	left;
	UINT32	top;
	UINT32	right;
	UINT32	bottom;
}RECT;


/*
 * Define LCD driver registers
 */
typedef struct _LCD_BASE_REG
{
//#ifndef DISP_ASIC_B030
    P_SYS_CTRL_REG      pSysCtrlReg;
//#else
    volatile ULONG*     pLcmGpio10Reg;
//#endif
    P_CLCDC_REG         pClcdcReg;
    P_SSP_REG           pSspReg;

    /*define LCD display related parameters*/
    UINT32              ulDispScreenWidth;
    UINT32              ulDispScreenHeight;
    INT32               ulDispBpp;
    UINT32              ulPanelSelectOpFlag;
    UINT32              ulFrameBufferSize;
    UINT32              ulFrameBufferPhyAddr;
    UINT32              ulFrameBufferVirtualAddr;
      
}LCD_REG, *P_LCD_REG;


/*
 * Define CLCDC driver error codes
 */
#define CLCDC_SUCCESS           0
#define CLCDC_FAILURE           -1
#define CLCDC_ERR_MEM_ALLOC     -2


/*Interface functions delcare*/
INT32 LCMSleepIn(void);
INT32 LCMSleepOut(void);
void dispInitialize(void);

void Sleep(UINT32 num);

#ifdef __cplusplus
} /* allow C++ to use these headers */
#endif /* __cplusplus */

#endif  /*End, __PL110_CLCDC_H__*/