aic231215.asm

在TI DSP的开发环境CCS(Code Composer Studio)下

                   .title "AIC23.asm"
                   .mmregs
stack              .usect "stack",100h
                   .bss   audio_data,20h
;定义MCBSP0的各个寄存器	
bsp2               .set  35h                  
drr22              .set  30h
drr12              .set  31h
dxr22              .set  32h
dxr12              .set  33h
spsa2              .set  34h

bsp0               .set  39h                  
drr20              .set  20h
drr10              .set  21h
dxr20              .set  22h
dxr10              .set  23h
spsa0              .set  38h
spcr10             .set  00h
spcr20             .set  01h
rcr10              .set  02h
rcr20              .set  03h
xcr10              .set  04h
xcr20              .set  05h
srgr10             .set  06h
srgr20             .set  07h
pcr0               .set  0eh
;clkmd              .set  58h
cpldport1          .set  2000h
temp               .set   060h             
;延时时间
time_derive        .set  01h
                   .def  _c_int00
                   .data
audio_table:       .word 0000h,2000h,4000h,6000h,7000h,6000h,4000h,2000h,0000h
                   .word 0e000h,0c000h,0a000h,9000h,0a000h,0c000h,0e000h
                   .text
_c_int00:           stm #7000h,swwsr              ;等待0个时钟
                    stm #stack+100h,sp          ;设置堆栈指针
                    ld #00h,dp
                    STM #0b, CLKMD ;switch to DIV mode
TstStatu: 
					LDM CLKMD, A
					AND #01b, A ;poll STATUS bit
					BC TstStatu, ANEQ
					STM #0100001111101111b, CLKMD ;时钟为10倍频，127X16个等待时钟，PLL开，分频关 
					RPT #10000
					NOP
				
                    stm #0000h,imr              ;屏蔽所有中断
                    rsbx cpl                    ;清CPL位=0
                    ;初始化cpu完毕，开始初始化MCBSP0                    
write_cpld0    
loop7               
                    stm  #0001h,ar1
                    stm  #0000h,ar2
                    portw ar1,cpldport1           ;切换字写到CPLD控制寄存器，转为控制字输出
                    rpt #400                      ;等400个周期
                    nop 
                    portr  cpldport1,ar2
                    rpt #400
                    nop                         ;等400个周期
                    bitf ar2,#0001h
                    bc   write_cpld0,ntc
                    rpt #400
                    nop  
                    ld #00h,dp
                    stm #spcr10,spsa0            ;接收复位
                    stm #0000h,bsp0
                    stm #spcr20,spsa0            ;发送、采样、帧复位
                    stm #0000h,bsp0
                    stm #spcr10,spsa0            ;12、11位为10，进入SPI模式，7位（DXENA）为0，不起动DX延时
                    stm #1000h,bsp0
                    stm #pcr0,spsa0              ;1位置1，数据下沿发送上沿接收,3位置1，帧同步为低电平有效，9位置1