fet140_i2c_11.s43

MSP430的汇编开发例子

;******************************************************************************
;   MSP-FET430P140 Demo - I2C, Multimaster Interface
;
;   Description: This demo connects two MSP430s via the I2C bus. Both MSP430s
;   are configured to be master transmitters when they need to transmit and
;   slave receivers when they are not transmitting. The I2C data to be
;   transmitted comes into the MSP430 via UART1 and a PC. When the complete
;   system shown below is assembled, you will be able to type data in a
;   terminal window of one of the PCs, it will be received by the MSP430
;   connected to it's serial port, it will then be transmitted to the other
;   MSP430 via I2C. After the other MSP430 receives it from I2C, it will send
;   it to its PC via UART1 and the data can be displayed in a terminal window.
;
;   The RS232 settings for the UARTS are 2400 baud, N81. The code is normally in
;   LPM3 with both the UART and the I2C ready to receive a charcter. When A UART
;   character comes in, the UART receive interrupt occurs and the code configures the
;   I2C for master transmiter and transmits the character on the I2C bus. It
;   then goes back into receive-ready mode for both the UART and the I2C.  If
;   an I2C character comes the I2C receive ready interrupt occurs and the code
;   transmits the character out the UART.  In case arbitration is lost, the
;   code echoes back the character to the UART so the user can see that
;   arbitration was lost.
;
;   ACLK = UCLK1 = 32768, I2CCLK = MCLK = SMCLK = ~800kHz
;   //* An external watch crystal on XIN XOUT is required for ACLK *//	
;   //* MSP430F169 Device Required *//
;
;   ** NOTE ** The slave address and Own Address of the two MSP430s in the
;   system must be different.
;
;
;                                 /|\   /|\
;      COMPUTER      MSP430F169   10k   10k   MSP430F169      COMPUTER
;      --------      ----------    |     |    ----------      --------
;     |        |    |      P3.1|<--|-----+-->|P3.1      |    |        |
;     |      TX|--->|URXD1 P3.3|<--+-------->|P3.3 URXD1|<---|TX      |
;     |      RX|<---|UTXD1     |             |     UTXD1|--->|RX      |
;     |        |    |       XIN|             |XIN       |    |        |
;     |        |    |          |32kHZ   32khZ|          |    |        |
;     |        |    |      XOUT|             |XOUT      |    |        |
;
;
;   M. Mitchell
;   Texas Instruments Inc.
;   Feb 2005
;   Built with IAR Embedded Workbench Version: 3.21A
;******************************************************************************
#include  <msp430x16x.h>
;------------------------------------------------------------------------------
            ORG     01100h                  ; Progam Start
;------------------------------------------------------------------------------
RESET       mov.w   #0A00h,SP               ; Initialize stackpointer
StopWDT     mov.w   #WDTPW+WDTHOLD,&WDTCTL  ; Stop WDT

            bis.b    #CHAR,&U1CTL           ; 8-bit character, SWRST = 1
            mov.b    #SSEL0,&U1TCTL         ; UCLK = ACLK
            mov.b    #00Dh,&U1BR0           ; 32k/2400 - 13.65
            mov.b    #000h,&U1BR1           ;
            mov.b    #06Bh,&U1MCTL          ; Modulation
            bis.b    #UTXE1+URXE1,&ME2      ; Enable USART1 TXD/RXD
            bic.b    #SWRST,&U1CTL          ; Enable USART1
            bis.b    #URXIE1,&IE2           ; Enable USART1 RX interrupt

            mov.b    #0CAh,&P3SEL           ; USART1 and I2C pin option select
            mov.b    #020h,&P3DIR           ; P3.6 = output direction

            bis.b    #I2C+SYNC,&U0CTL       ; Recommended I2C init procedure
            bic.b    #I2CEN,&U0CTL          ; Recommended I2C init procedure
            bis.b    #I2CSSEL1,&I2CTCTL     ; SMCLK for I2C

; !!!!!  Slave Address of first device must match own address of 2nd device
;        Change comments for following 4 lines for each MSP430
            mov      #0048h,&I2COA          ; Own address for device 1
            mov      #0056h,&I2CSA          ; Write to I2C address
         ;   mov     #0056h,&I2COA          ; Own address for device 2
         ;   mov     #0048h,&I2CSA          ; Address of device 1

            mov.b    #RXRDYIE+ALIE+NACKIE+ARDYIE,&I2CIE ; Enable used I2C interrupts
            bis.b    #I2CEN,&U0CTL          ; Enable I2C


Mainloop
            bis     #LPM3+GIE,SR       ; Enter LPM3 with interrupts
Test_Busy   bit.b   #I2CBUSY,&I2CDCTL       ; I2C ready?
            jnz     Test_Busy               ;
            bis.b   #MST,&U0CTL             ; Master mode
            mov.b   #01h,&I2CNDAT           ; Write one byte
            bis.b   #I2CSTT+I2CSTP+I2CTRX,&I2CTCTL  ; Initiate transfer
            mov.b   &RXBUF1,&I2CDRB         ; Copy RXBUF1 to I2CDRB
            jmp     Mainloop                ; Loop

;------------------------------------------------------------------------------
USART1RX_ISR;    USART1 RX Vector
;------------------------------------------------------------------------------
            bic     #LPM3,0(SP)        ; Clear LPM3 bits from stack
            reti

;------------------------------------------------------------------------------
I2C_ISR;    Common ISR for I2C Module
;------------------------------------------------------------------------------
            add     &I2CIV,PC               ; Add I2C offset vector
            reti                            ; No interrupt
            jmp     AL_LOST                 ; Arbitration Lost
            jmp     NO_ACK                  ; No Acknowledge
            reti                            ; Own Address
            jmp     ARDY_ISR                ; Register Access Ready
            jmp     RXRDY_ISR               ; Receive Ready
            reti                            ; Transmit Ready
            reti                            ; General Call
            reti                            ; Start Condition

AL_LOST     mov.b   &RXBUF1,&TXBUF1         ; Echo char is Arbitration lost
            bic.b   #I2CTRX,&I2CTCTL        ; Clear transmit mode
            reti                            ; return

NO_ACK      bic.b   #MST,&U0CTL             ; Clear master mode
            bic.b   #I2CTRX,&I2CTCTL        ; Clear transmit mode
            reti                            ; return

ARDY_ISR    bic.b   #I2CTRX,&I2CTCTL        ; Clear transmit mode
            reti                            ; return

RXRDY_ISR   bit.b   #UTXIFG1,&IFG2          ; USART1 TX buffer ready?
            jz      RXRDY_ISR               ; Wait
            bic.b   #I2CTRX,&I2CTCTL        ; Clear transmit mode
            mov.b   &I2CDRB,&TXBUF1         ; Copy I2C RX data to TXBUF1
            reti                            ; return

;------------------------------------------------------------------------------
;           Interrupt Vectors
;------------------------------------------------------------------------------
            ORG     0FFFEh                  ; MSP430 RESET vector
            DW      RESET                   ;
            ORG     0FFF0h                  ; I2C interrupt vector
            DW      I2C_ISR                 ;
            ORG     0FFE6h                  ; USART1 RX vector
            DW      USART1RX_ISR            ;
            END