usbcfg.h

源代码

///
/// @File : usbcfg.h
/// @Description : Hardware Configuration on 2440A

#ifndef __USBCFG_H_
#define __USBCFG_H_

//#define REAL_PHYSICAL_ADDR_EP3_FIFO		(0x520001CC) //Endpoint 3 FIFO
#define REAL_PHYSICAL_ADDR_EP4_FIFO		(0x520001D0)	// Endpoint 4 FIFO  by J.I inserted(8/22)

//OUT_CSR2
#define EPO_OUT_DMA_INT_MASK	(1<<5)
#define EPO_ISO		 	(1<<6)
#define EPO_BULK	 	(0<<6)
#define EPO_AUTO_CLR		(1<<7)

//USB DMA control register
#define UDMA_IN_RUN_OB		(1<<7)
#define UDMA_IGNORE_TTC		(1<<7)
#define UDMA_DEMAND_MODE	(1<<3)
#define UDMA_OUT_RUN_OB		(1<<2)
#define UDMA_OUT_DMA_RUN	(1<<2)
#define UDMA_IN_DMA_RUN		(1<<1)
#define UDMA_DMA_MODE_EN	(1<<0)

#define pISR		(*(unsigned *)(0xA0000000+0x18)) //(0x30000000+0x18))		// Virtual Address 0x0 is mapped to PA 0x30000000, ISR Address is VA 0x18
#define U8	unsigned char
#define U32 unsigned int
#define BUFARRAYSIZE 64

#define DMABUFFER 0x32000000 // PA
#define DMABUFFER_VA 0xA2000000 // VA

#define BULK_PKT_SIZE			64
#define EP0_PKT_SIZE			8	
#define EP1_PKT_SIZE			BULK_PKT_SIZE
#define EP3_PKT_SIZE			BULK_PKT_SIZE
#define EP4_PKT_SIZE			BULK_PKT_SIZE	// by J.I inserted(8/22)

/*
#define rEP3_DMA_TTC_L     (*(volatile unsigned char *)0x5200024c)	//EP3 DMA total Tx counter
#define rEP3_DMA_TTC_M     (*(volatile unsigned char *)0x52000250)
#define rEP3_DMA_TTC_H     (*(volatile unsigned char *)0x52000254)
#define rEP3_DMA_TTC	(pUSBCtrlAddr->EP3DTL.ep3_ttl_l+(pUSBCtrlAddr->EP3DTM.ep3_ttl_m<<8)+(pUSBCtrlAddr->EP3DTH.ep3_ttl_h<<16))
*/
// by J.I inserted(8/22)
#define rEP4_DMA_TTC_L     (*(volatile unsigned char *)0x52000264) //EP4 DMA total Tx counter	// Little Endian Setting
#define rEP4_DMA_TTC_M     (*(volatile unsigned char *)0x52000268)
#define rEP4_DMA_TTC_H     (*(volatile unsigned char *)0x5200026C)
#define rEP4_DMA_TTC 	(pUSBCtrlAddr->EP4DTL.ep4_ttl_l+(pUSBCtrlAddr->EP4DTM.ep4_ttl_m<<8)+(pUSBCtrlAddr->EP4DTH.ep4_ttl_h<<16))
// end inserted

#define SKIP 1
#define DOIT 0

// Standard bmRequestType (Recipient)
#define DEVICE_RECIPIENT            (0)
#define INTERFACE_RECIPIENT         (1)
#define ENDPOINT_RECIPIENT          (2)
#define OTHER_RECIPIENT             (3)

#define EP0_STATE_INIT			(0)  
#define EP0_STATE_GD_DEV_0		(10)  //10-10=0 
#define EP0_STATE_GD_DEV_1		(11)  //11-10=1
#define EP0_STATE_GD_DEV_2		(12)  //12-10=2
#define EP0_STATE_GD_CFG_0		(20)
#define EP0_STATE_GD_CFG_1		(21)
#define EP0_STATE_GD_CFG_2		(22)
#define EP0_STATE_GD_CFG_3		(23)
#define EP0_STATE_GD_CFG_4		(24)
#define EP0_STATE_GD_CFG_ONLY_0	(40)
#define EP0_STATE_GD_CFG_ONLY_1	(41)
#define EP0_STATE_GD_IF_ONLY_0	(42)
#define EP0_STATE_GD_IF_ONLY_1	(43)
#define EP0_STATE_GD_EP0_ONLY_0	(44)
#define EP0_STATE_GD_EP1_ONLY_0	(45)
#define EP0_INTERFACE_GET		(46)
#define EP0_STATE_GD_STR_I0		(30)  
#define EP0_STATE_GD_STR_I1		(31)  
#define EP0_STATE_GD_STR_I2		(32)  
#define EP0_CONFIG_SET			(33)
#define EP0_GET_STATUS0			(35)
#define EP0_GET_STATUS1			(36)
#define EP0_GET_STATUS2			(37)
#define EP0_GET_STATUS3			(38)
#define EP0_GET_STATUS4			(39)

#define CLR_EP0_OUT_PKT_RDY()		pUSBCtrlAddr->EP0ICSR1.sopr_cdt = 1; pUSBCtrlAddr->EP0ICSR1.sse_ = 0;
#define CLR_EP0_OUTPKTRDY_DATAEND() pUSBCtrlAddr->EP0ICSR1.sopr_cdt = 1; pUSBCtrlAddr->EP0ICSR1.de_ff = 1;; pUSBCtrlAddr->EP0ICSR1.sse_ = 0;
#define SET_EP0_IN_PKT_RDY() 		pUSBCtrlAddr->EP0ICSR1.ipr_ = 1; pUSBCtrlAddr->EP0ICSR1.sopr_cdt = 0; pUSBCtrlAddr->EP0ICSR1.sse_ = 0;

#define SET_EP0_INPKTRDY_DATAEND() 	pUSBCtrlAddr->EP0ICSR1.ipr_ = 1; pUSBCtrlAddr->EP0ICSR1.de_ff = 1; pUSBCtrlAddr->EP0ICSR1.sse_ = 0; pUSBCtrlAddr->EP0ICSR1.sopr_cdt = 0;
#define CLR_EP0_SETUP_END() 		pUSBCtrlAddr->EP0ICSR1.sse_ = 1; pUSBCtrlAddr->EP0ICSR1.sopr_cdt = 0;
#define CLR_EP0_SENT_STALL() 		pUSBCtrlAddr->EP0ICSR1.sts_ = 0; pUSBCtrlAddr->EP0ICSR1.sopr_cdt = 0; pUSBCtrlAddr->EP0ICSR1.sse_ = 0;
#define FLUSH_EP0_FIFO() 			{while(pUSBCtrlAddr->OFCR1.out_cnt_low) pUSBCtrlAddr->EP0F.fifo_data;}
/*
#define CLR_EP3_OUT_PKT_READY()		pUSBCtrlAddr->OCSR1.fifo_flush = 0;	pUSBCtrlAddr->OCSR1.send_stall = 0;	pUSBCtrlAddr->OCSR1.clr_data_tog = 0; pUSBCtrlAddr->OCSR1.out_pkt_rdy = 0;
#define CLR_EP3_SENT_STALL()		pUSBCtrlAddr->OCSR1.fifo_flush = 0;	pUSBCtrlAddr->OCSR1.send_stall = 0; pUSBCtrlAddr->OCSR1.clr_data_tog = 0; pUSBCtrlAddr->OCSR1.sent_stall = 0;
*/
// by J.I inserted(8/22)
#define CLR_EP4_OUT_PKT_READY()		pUSBCtrlAddr->OCSR1.fifo_flush = 0;	pUSBCtrlAddr->OCSR1.send_stall = 0;	pUSBCtrlAddr->OCSR1.clr_data_tog = 0; pUSBCtrlAddr->OCSR1.out_pkt_rdy = 0;
#define CLR_EP4_SENT_STALL()		pUSBCtrlAddr->OCSR1.fifo_flush = 0;	pUSBCtrlAddr->OCSR1.send_stall = 0; pUSBCtrlAddr->OCSR1.clr_data_tog = 0; pUSBCtrlAddr->OCSR1.sent_stall = 0;
// end inserted


// Descriptor Types
#define USB_DEVICE_TYPE                 (1)
#define CONFIGURATION_TYPE          (2)
#define STRING_TYPE                 (3)
#define INTERFACE_TYPE              (4)
#define ENDPOINT_TYPE               (5)

//string descriptor
#define LANGID_US_L 		    (0x09)  
#define LANGID_US_H 		    (0x04)

// Standard Request Codes 
#define GET_STATUS                  (0)
#define CLEAR_FEATURE               (1)
#define SET_FEATURE                 (3)
#define SET_ADDRESS                 (5)
#define GET_DESCRIPTOR              (6)
#define SET_DESCRIPTOR              (7)
#define GET_CONFIGURATION           (8)
#define SET_CONFIGURATION           (9)
#define GET_INTERFACE               (10)
#define SET_INTERFACE               (11)
#define SYNCH_FRAME                 (12)

//configuration descriptor: bmAttributes 
#define CONF_ATTR_DEFAULT	    (0x80) //Spec 1.0 it was BUSPOWERED bit.
#define CONF_ATTR_REMOTE_WAKEUP     (0x20)
#define CONF_ATTR_SELFPOWERED       (0x40)

//endpoint descriptor
#define EP_ADDR_IN		    (0x80)	
#define EP_ADDR_OUT		    (0x00)

#define EP_ATTR_CONTROL		    (0x0)	
#define EP_ATTR_ISOCHRONOUS	    (0x1)
#define EP_ATTR_BULK		    (0x2)
#define EP_ATTR_INTERRUPT	    (0x3)	

#define	DELAY_EP4INT_TO_DIDST3SET		2000

#endif // __USBCFG_H_