ops.c

u-boot1.3.0的原码,从配了网络驱动和FLASH的驱动,并该用ESC竟如

/****************************************************************************
*			Realmode X86 Emulator Library
*
*  Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
*  Jason Jin <[e-mail]>
*
*		Copyright (C) 1991-2004 SciTech Software, Inc.
*				     Copyright (C) David Mosberger-Tang
*					   Copyright (C) 1999 Egbert Eich
*
*  ========================================================================
*
*  Permission to use, copy, modify, distribute, and sell this software and
*  its documentation for any purpose is hereby granted without fee,
*  provided that the above copyright notice appear in all copies and that
*  both that copyright notice and this permission notice appear in
*  supporting documentation, and that the name of the authors not be used
*  in advertising or publicity pertaining to distribution of the software
*  without specific, written prior permission.	The authors makes no
*  representations about the suitability of this software for any purpose.
*  It is provided "as is" without express or implied warranty.
*
*  THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
*  INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
*  EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
*  CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
*  USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
*  OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
*  PERFORMANCE OF THIS SOFTWARE.
*
*  ========================================================================
*
* Language:		ANSI C
* Environment:	Any
* Developer:	Kendall Bennett
*
* Description:	This file includes subroutines to implement the decoding
*		and emulation of all the x86 processor instructions.
*
* There are approximately 250 subroutines in here, which correspond
* to the 256 byte-"opcodes" found on the 8086.	The table which
* dispatches this is found in the files optab.[ch].
*
* Each opcode proc has a comment preceeding it which gives it's table
* address.  Several opcodes are missing (undefined) in the table.
*
* Each proc includes information for decoding (DECODE_PRINTF and
* DECODE_PRINTF2), debugging (TRACE_REGS, SINGLE_STEP), and misc
* functions (START_OF_INSTR, END_OF_INSTR).
*
* Many of the procedures are *VERY* similar in coding.	This has
* allowed for a very large amount of code to be generated in a fairly
* short amount of time (i.e. cut, paste, and modify).  The result is
* that much of the code below could have been folded into subroutines
* for a large reduction in size of this file.  The downside would be
* that there would be a penalty in execution speed.  The file could
* also have been *MUCH* larger by inlining certain functions which
* were called.	This could have resulted even faster execution.	 The
* prime directive I used to decide whether to inline the code or to
* modularize it, was basically: 1) no unnecessary subroutine calls,
* 2) no routines more than about 200 lines in size, and 3) modularize
* any code that I might not get right the first time.  The fetch_*
* subroutines fall into the latter category.  The The decode_* fall
* into the second category.  The coding of the "switch(mod){ .... }"
* in many of the subroutines below falls into the first category.
* Especially, the coding of {add,and,or,sub,...}_{byte,word}
* subroutines are an especially glaring case of the third guideline.
* Since so much of the code is cloned from other modules (compare
* opcode #00 to opcode #01), making the basic operations subroutine
* calls is especially important; otherwise mistakes in coding an
* "add" would represent a nightmare in maintenance.
*
* Jason ported this file to u-boot. place all the function pointer in
* the got2 sector. Removed some opcode.
*
****************************************************************************/

#include <common.h>

#if defined(CONFIG_BIOSEMU)

#include "x86emu/x86emui.h"

/*----------------------------- Implementation ----------------------------*/

/* constant arrays to do several instructions in just one function */

#ifdef DEBUG
static char *x86emu_GenOpName[8] = {
    "ADD", "OR", "ADC", "SBB", "AND", "SUB", "XOR", "CMP"};
#endif

/* used by several opcodes  */
static u8 (*genop_byte_operation[])(u8 d, u8 s) __attribute__ ((section(".got2"))) =
{
    add_byte,		/* 00 */
    or_byte,		/* 01 */
    adc_byte,		/* 02 */
    sbb_byte,		/* 03 */
    and_byte,		/* 04 */
    sub_byte,		/* 05 */
    xor_byte,		/* 06 */
    cmp_byte,		/* 07 */
};

static u16 (*genop_word_operation[])(u16 d, u16 s) __attribute__ ((section(".got2"))) =
{
    add_word,		/*00 */
    or_word,		/*01 */
    adc_word,		/*02 */
    sbb_word,		/*03 */
    and_word,		/*04 */
    sub_word,		/*05 */
    xor_word,		/*06 */
    cmp_word,		/*07 */
};

static u32 (*genop_long_operation[])(u32 d, u32 s) __attribute__ ((section(".got2"))) =
{
    add_long,		/*00 */
    or_long,		/*01 */
    adc_long,		/*02 */
    sbb_long,		/*03 */
    and_long,		/*04 */
    sub_long,		/*05 */
    xor_long,		/*06 */
    cmp_long,		/*07 */
};

/* used by opcodes 80, c0, d0, and d2. */
static u8(*opcD0_byte_operation[])(u8 d, u8 s) __attribute__ ((section(".got2"))) =
{
    rol_byte,
    ror_byte,
    rcl_byte,
    rcr_byte,
    shl_byte,
    shr_byte,
    shl_byte,		/* sal_byte === shl_byte  by definition */
    sar_byte,
};

/* used by opcodes c1, d1, and d3. */
static u16(*opcD1_word_operation[])(u16 s, u8 d) __attribute__ ((section(".got2"))) =
{
    rol_word,
    ror_word,
    rcl_word,
    rcr_word,
    shl_word,
    shr_word,
    shl_word,		/* sal_byte === shl_byte  by definition */
    sar_word,
};

/* used by opcodes c1, d1, and d3. */
static u32 (*opcD1_long_operation[])(u32 s, u8 d) __attribute__ ((section(".got2"))) =
{
    rol_long,
    ror_long,
    rcl_long,
    rcr_long,
    shl_long,
    shr_long,
    shl_long,		/* sal_byte === shl_byte  by definition */
    sar_long,
};

#ifdef DEBUG

static char *opF6_names[8] =
  { "TEST\t", "", "NOT\t", "NEG\t", "MUL\t", "IMUL\t", "DIV\t", "IDIV\t" };

#endif

/****************************************************************************
PARAMETERS:
op1 - Instruction op code

REMARKS:
Handles illegal opcodes.
****************************************************************************/
void x86emuOp_illegal_op(
    u8 op1)
{
    START_OF_INSTR();
    if (M.x86.R_SP != 0) {
	DECODE_PRINTF("ILLEGAL X86 OPCODE\n");
	TRACE_REGS();
	DB( printk("%04x:%04x: %02X ILLEGAL X86 OPCODE!\n",
	    M.x86.R_CS, M.x86.R_IP-1,op1));
	HALT_SYS();
	}
    else {
	/* If we get here, it means the stack pointer is back to zero
	 * so we are just returning from an emulator service call
	 * so therte is no need to display an error message. We trap
	 * the emulator with an 0xF1 opcode to finish the service
	 * call.
	 */
	X86EMU_halt_sys();
	}
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcodes 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38
****************************************************************************/
void x86emuOp_genop_byte_RM_R(u8 op1)
{
    int mod, rl, rh;
    uint destoffset;
    u8 *destreg, *srcreg;
    u8 destval;

    op1 = (op1 >> 3) & 0x7;

    START_OF_INSTR();
    DECODE_PRINTF(x86emu_GenOpName[op1]);
    DECODE_PRINTF("\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if(mod<3)
	{ destoffset = decode_rmXX_address(mod,rl);
	DECODE_PRINTF(",");
	destval = fetch_data_byte(destoffset);
	srcreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	destval = genop_byte_operation[op1](destval, *srcreg);
	store_data_byte(destoffset, destval);
	}
    else
	{			/* register to register */
	destreg = DECODE_RM_BYTE_REGISTER(rl);
	DECODE_PRINTF(",");
	srcreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF("\n");
	TRACE_AND_STEP();
	*destreg = genop_byte_operation[op1](*destreg, *srcreg);
	}
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcodes 0x01, 0x09, 0x11, 0x19, 0x21, 0x29, 0x31, 0x39
****************************************************************************/
void x86emuOp_genop_word_RM_R(u8 op1)
{
    int mod, rl, rh;
    uint destoffset;

    op1 = (op1 >> 3) & 0x7;

    START_OF_INSTR();
    DECODE_PRINTF(x86emu_GenOpName[op1]);
    DECODE_PRINTF("\t");
    FETCH_DECODE_MODRM(mod, rh, rl);

    if(mod<3) {
	destoffset = decode_rmXX_address(mod,rl);
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 destval;
	    u32 *srcreg;

	    DECODE_PRINTF(",");
	    destval = fetch_data_long(destoffset);
	    srcreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    destval = genop_long_operation[op1](destval, *srcreg);
	    store_data_long(destoffset, destval);
	} else {
	    u16 destval;
	    u16 *srcreg;

	    DECODE_PRINTF(",");
	    destval = fetch_data_word(destoffset);
	    srcreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    destval = genop_word_operation[op1](destval, *srcreg);
	    store_data_word(destoffset, destval);
	}
    } else {			/* register to register */
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *destreg,*srcreg;

	    destreg = DECODE_RM_LONG_REGISTER(rl);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = genop_long_operation[op1](*destreg, *srcreg);
	} else {
	    u16 *destreg,*srcreg;

	    destreg = DECODE_RM_WORD_REGISTER(rl);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = genop_word_operation[op1](*destreg, *srcreg);
	}
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcodes 0x02, 0x0a, 0x12, 0x1a, 0x22, 0x2a, 0x32, 0x3a
****************************************************************************/
void x86emuOp_genop_byte_R_RM(u8 op1)
{
    int mod, rl, rh;
    u8 *destreg, *srcreg;
    uint srcoffset;
    u8 srcval;

    op1 = (op1 >> 3) & 0x7;

    START_OF_INSTR();
    DECODE_PRINTF(x86emu_GenOpName[op1]);
    DECODE_PRINTF("\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
	destreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF(",");
	srcoffset = decode_rmXX_address(mod,rl);
	srcval = fetch_data_byte(srcoffset);
    } else {	 /* register to register */
	destreg = DECODE_RM_BYTE_REGISTER(rh);
	DECODE_PRINTF(",");
	srcreg = DECODE_RM_BYTE_REGISTER(rl);
	srcval = *srcreg;
    }
    DECODE_PRINTF("\n");
    TRACE_AND_STEP();
    *destreg = genop_byte_operation[op1](*destreg, srcval);

    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcodes 0x03, 0x0b, 0x13, 0x1b, 0x23, 0x2b, 0x33, 0x3b
****************************************************************************/
void x86emuOp_genop_word_R_RM(u8 op1)
{
    int mod, rl, rh;
    uint srcoffset;
    u32 *destreg32, srcval;
    u16 *destreg;

    op1 = (op1 >> 3) & 0x7;

    START_OF_INSTR();
    DECODE_PRINTF(x86emu_GenOpName[op1]);
    DECODE_PRINTF("\t");
    FETCH_DECODE_MODRM(mod, rh, rl);
    if (mod < 3) {
	srcoffset = decode_rmXX_address(mod,rl);
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    destreg32 = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcval = fetch_data_long(srcoffset);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg32 = genop_long_operation[op1](*destreg32, srcval);
	} else {
	    destreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcval = fetch_data_word(srcoffset);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = genop_word_operation[op1](*destreg, srcval);
	}
    } else {			 /* register to register */
	if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	    u32 *srcreg;
	    destreg32 = DECODE_RM_LONG_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_LONG_REGISTER(rl);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg32 = genop_long_operation[op1](*destreg32, *srcreg);
	} else {
	    u16 *srcreg;
	    destreg = DECODE_RM_WORD_REGISTER(rh);
	    DECODE_PRINTF(",");
	    srcreg = DECODE_RM_WORD_REGISTER(rl);
	    DECODE_PRINTF("\n");
	    TRACE_AND_STEP();
	    *destreg = genop_word_operation[op1](*destreg, *srcreg);
	}
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcodes 0x04, 0x0c, 0x14, 0x1c, 0x24, 0x2c, 0x34, 0x3c
****************************************************************************/
void x86emuOp_genop_byte_AL_IMM(u8 op1)
{
    u8 srcval;

    op1 = (op1 >> 3) & 0x7;

    START_OF_INSTR();
    DECODE_PRINTF(x86emu_GenOpName[op1]);
    DECODE_PRINTF("\tAL,");
    srcval = fetch_byte_imm();
    DECODE_PRINTF2("%x\n", srcval);
    TRACE_AND_STEP();
    M.x86.R_AL = genop_byte_operation[op1](M.x86.R_AL, srcval);
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcodes 0x05, 0x0d, 0x15, 0x1d, 0x25, 0x2d, 0x35, 0x3d
****************************************************************************/
void x86emuOp_genop_word_AX_IMM(u8 op1)
{
    u32 srcval;

    op1 = (op1 >> 3) & 0x7;

    START_OF_INSTR();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	DECODE_PRINTF(x86emu_GenOpName[op1]);
	DECODE_PRINTF("\tEAX,");
	srcval = fetch_long_imm();
    } else {
	DECODE_PRINTF(x86emu_GenOpName[op1]);
	DECODE_PRINTF("\tAX,");
	srcval = fetch_word_imm();
    }
    DECODE_PRINTF2("%x\n", srcval);
    TRACE_AND_STEP();
    if (M.x86.mode & SYSMODE_PREFIX_DATA) {
	M.x86.R_EAX = genop_long_operation[op1](M.x86.R_EAX, srcval);
    } else {
	M.x86.R_AX = genop_word_operation[op1](M.x86.R_AX, (u16)srcval);
    }
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x06
****************************************************************************/
void x86emuOp_push_ES(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("PUSH\tES\n");
    TRACE_AND_STEP();
    push_word(M.x86.R_ES);
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************
REMARKS:
Handles opcode 0x07
****************************************************************************/
void x86emuOp_pop_ES(u8 X86EMU_UNUSED(op1))
{
    START_OF_INSTR();
    DECODE_PRINTF("POP\tES\n");
    TRACE_AND_STEP();
    M.x86.R_ES = pop_word();
    DECODE_CLEAR_SEGOVR();
    END_OF_INSTR();
}

/****************************************************************************