peripherals_lpc23xx.h

Show hou use semaphores in RTL-ARM

#define ETH_TSV1		(*(REG32 0xFFE0015C))
#define ETH_RSV			(*(REG32 0xFFE00160))

#define ETH_FLOWCNTCOUNT (*(REG32 0xFFE00170))
#define ETH_FLOWCNTSTAT	(*(REG32 0xFFE00174))

// Rx Filter registers

#define ETH_RXFILTERCTL			(*(REG32 0xFFE00200))
#define ETH_RXFILTERWOLSTAT		(*(REG32 0xFFE00204))
#define ETH_RXFILTERWOLCLR		(*(REG32 0xFFE00208))

#define ETH_HASHFILTERL			(*(REG32 0xFFE00210))
#define ETH_HASHFILTERH			(*(REG32 0xFFE00214))

// module control registers

#define ETH_INSTSTAT	(*(REG32 0xFFE00FE0))
#define ETH_INTENABLE	(*(REG32 0xFFE00FE4))
#define ETH_INTCLEAR	(*(REG32 0xFFE00FE8))
#define ETH_INTSET		(*(REG32 0xFFE00FEC))

#define ETH_POWERDOWN	(*(REG32 0xFFE00FF4))


                 
/*##############################################################################
## GPIO - General Purpose I/O
##############################################################################*/

#define		GPIO0_Base	0xE0028000
#define		GPIO1_Base	0xE0028010
#define 	GPIO2_Base  0x3FFFC040

/* GPIO Port 0 */
#define GPIO0_IOPIN     (*(REG32 (GPIO0_Base + 0x00))) 
#define GPIO0_IOSET     (*(REG32 (GPIO0_Base + 0x04)))
#define GPIO0_IODIR     (*(REG32 (GPIO0_Base + 0x08)))
#define GPIO0_IOCLR     (*(REG32 (GPIO0_Base + 0x0C)))
#define Speaker         (0x01<<26)

/* GPIO Port 1*/
#define GPIO1_IOPIN     (*(REG32 (GPIO1_Base + 0x00))) 
#define GPIO1_IOSET     (*(REG32 (GPIO1_Base + 0x04)))
#define GPIO1_IODIR     (*(REG32 (GPIO1_Base + 0x08)))
#define GPIO1_IOCLR     (*(REG32 (GPIO1_Base + 0x0C)))

/* Fast access Input/Output (GPIO0)  */
#define FGPIO0_IODIR    (*(REG32 (GPIO0_Base + 0x00)))
#define FGPIO0_IOMASK   (*(REG32 (GPIO0_Base + 0x10)))
#define FGPIO0_IOPIN    (*(REG32 (GPIO0_Base + 0x14)))
#define FGPIO0_IOSET    (*(REG32 (GPIO0_Base + 0x18)))
#define FGPIO0_IOCLR    (*(REG32 (GPIO0_Base + 0x1C)))
/* Fast access Input/Output (GPIO1)  */
#define FGPIO1_IODIR    (*(REG32 (GPIO1_Base + 0x00)))
#define FGPIO1_IOMASK   (*(REG32 (GPIO1_Base + 0x10)))
#define FGPIO1_IOPIN    (*(REG32 (GPIO1_Base + 0x14)))
#define FGPIO1_IOSET    (*(REG32 (GPIO1_Base + 0x18)))
#define FGPIO1_IOCLR    (*(REG32 (GPIO1_Base + 0x1C)))
/* Fast access Input/Output (GPIO2)  */
#define FGPIO2_IODIR    (*(REG32 (GPIO2_Base + 0x00)))
#define FGPIO2_IOMASK   (*(REG32 (GPIO2_Base + 0x10)))
#define FGPIO2_IOPIN    (*(REG32 (GPIO2_Base + 0x14)))
#define FGPIO2_IOSET    (*(REG32 (GPIO2_Base + 0x18)))
#define FGPIO2_IOCLR    (*(REG32 (GPIO2_Base + 0x1C)))
/* Fast access Input/Output (GPIO3)  */
#define FGPIO3_IODIR    (*(REG32 (GPIO3_Base + 0x00)))
#define FGPIO3_IOMASK   (*(REG32 (GPIO3_Base + 0x10)))
#define FGPIO3_IOPIN    (*(REG32 (GPIO3_Base + 0x14)))
#define FGPIO3_IOSET    (*(REG32 (GPIO3_Base + 0x18)))
#define FGPIO3_IOCLR    (*(REG32 (GPIO3_Base + 0x1C)))
/* Fast access Input/Output (GPIO4)  */
#define FGPIO4_IODIR    (*(REG32 (GPIO4_Base + 0x00)))
#define FGPIO4_IOMASK   (*(REG32 (GPIO4_Base + 0x10)))
#define FGPIO4_IOPIN    (*(REG32 (GPIO4_Base + 0x14)))
#define FGPIO4_IOSET    (*(REG32 (GPIO4_Base + 0x18)))
#define FGPIO4_IOCLR    (*(REG32 (GPIO4_Base + 0x1C)))


/* Memory Accelerator Module (MAM) */
#define MAMCR          (*((volatile unsigned char *) 0xE01FC000))
#define MAMTIM         (*((volatile unsigned char *) 0xE01FC004))
#define MAMMAP         (*((volatile unsigned char *) 0xE01FC040))

/* Phase Locked Loop (PLL) */
#define PLLCON         (*((volatile unsigned char *) 0xE01FC080))
#define PLLCFG         (*((volatile unsigned char *) 0xE01FC084))
#define PLLSTAT        (*((volatile unsigned short*) 0xE01FC088))
#define PLLFEED        (*((volatile unsigned char *) 0xE01FC08C))

/* VPB Divider */
#define VPBDIV         (*((volatile unsigned char *) 0xE01FC100))


/* External Interrupts */
#define EXTINT         (*((volatile unsigned char *) 0xE01FC140))
#define EXTWAKE        (*((volatile unsigned char *) 0xE01FC144))
#define EXTMODE        (*((volatile unsigned char *) 0xE01FC148))
#define EXTPOLAR       (*((volatile unsigned char *) 0xE01FC14C))

/* Timer 0 */
#define TIMER0_IR      (*((volatile unsigned long *) 0xE0004000))
#define TIMER0_TCR     (*((volatile unsigned long *) 0xE0004004))
#define TIMER0_TC      (*((volatile unsigned long *) 0xE0004008))
#define TIMER0_PR      (*((volatile unsigned long *) 0xE000400C))
#define TIMER0_PC      (*((volatile unsigned long *) 0xE0004010))
#define TIMER0_MCR     (*((volatile unsigned long *) 0xE0004014))
#define TIMER0_MR0     (*((volatile unsigned long *) 0xE0004018))
#define TIMER0_MR1     (*((volatile unsigned long *) 0xE000401C))
#define TIMER0_MR2     (*((volatile unsigned long *) 0xE0004020))
#define TIMER0_MR3     (*((volatile unsigned long *) 0xE0004024))
#define TIMER0_CCR     (*((volatile unsigned long *) 0xE0004028))
#define TIMER0_CR0     (*((volatile unsigned long *) 0xE000402C))
#define TIMER0_CR1     (*((volatile unsigned long *) 0xE0004030))
#define TIMER0_CR2     (*((volatile unsigned long *) 0xE0004034))
#define TIMER0_CR3     (*((volatile unsigned long *) 0xE0004038))
#define TIMER0_EMR     (*((volatile unsigned long *) 0xE000403C))

/* Timer 1 */
#define TIMER1_IR      (*((volatile unsigned long *) 0xE0008000))
#define TIMER1_TCR     (*((volatile unsigned long *) 0xE0008004))
#define TIMER1_TC      (*((volatile unsigned long *) 0xE0008008))
#define TIMER1_PR      (*((volatile unsigned long *) 0xE000800C))
#define TIMER1_PC      (*((volatile unsigned long *) 0xE0008010))
#define TIMER1_MCR     (*((volatile unsigned long *) 0xE0008014))
#define TIMER1_MR0     (*((volatile unsigned long *) 0xE0008018))
#define TIMER1_MR1     (*((volatile unsigned long *) 0xE000801C))
#define TIMER1_MR2     (*((volatile unsigned long *) 0xE0008020))
#define TIMER1_MR3     (*((volatile unsigned long *) 0xE0008024))
#define TIMER1_CCR     (*((volatile unsigned long *) 0xE0008028))
#define TIMER1_CR0     (*((volatile unsigned long *) 0xE000802C))
#define TIMER1_CR1     (*((volatile unsigned long *) 0xE0008030))
#define TIMER1_CR2     (*((volatile unsigned long *) 0xE0008034))
#define TIMER1_CR3     (*((volatile unsigned long *) 0xE0008038))
#define TIMER1_EMR     (*((volatile unsigned long *) 0xE000803C))

/* Pulse Width Modulator (PWM) */
#define PWM_IR         (*((volatile unsigned long *) 0xE0014000))
#define PWM_TCR        (*((volatile unsigned long *) 0xE0014004))
#define PWM_TC         (*((volatile unsigned long *) 0xE0014008))
#define PWM_PR         (*((volatile unsigned long *) 0xE001400C))
#define PWM_PC         (*((volatile unsigned long *) 0xE0014010))
#define PWM_MCR        (*((volatile unsigned long *) 0xE0014014))
#define PWM_MR0        (*((volatile unsigned long *) 0xE0014018))
#define PWM_MR1        (*((volatile unsigned long *) 0xE001401C))
#define PWM_MR2        (*((volatile unsigned long *) 0xE0014020))
#define PWM_MR3        (*((volatile unsigned long *) 0xE0014024))
#define PWM_MR4        (*((volatile unsigned long *) 0xE0014040))
#define PWM_MR5        (*((volatile unsigned long *) 0xE0014044))
#define PWM_MR6        (*((volatile unsigned long *) 0xE0014048))
#define PWM_CCR        (*((volatile unsigned long *) 0xE0014028))
#define PWM_CR0        (*((volatile unsigned long *) 0xE001402C))
#define PWM_CR1        (*((volatile unsigned long *) 0xE0014030))
#define PWM_CR2        (*((volatile unsigned long *) 0xE0014034))
#define PWM_CR3        (*((volatile unsigned long *) 0xE0014038))
#define PWM_EMR        (*((volatile unsigned long *) 0xE001403C))
#define PWM_PCR        (*((volatile unsigned long *) 0xE001404C))
#define PWM_LER        (*((volatile unsigned long *) 0xE0014050))

/* Universal Asynchronous Receiver Transmitter 0 (UART0) */
#define UART0_RBR      (*((volatile unsigned char *) 0xE000C000))
#define UART0_THR      (*((volatile unsigned char *) 0xE000C000))
#define UART0_IER      (*((volatile unsigned char *) 0xE000C004))
#define UART0_IIR      (*((volatile unsigned char *) 0xE000C008))
#define UART0_FCR      (*((volatile unsigned char *) 0xE000C008))
#define UART0_LCR      (*((volatile unsigned char *) 0xE000C00C))
#define UART0_MCR      (*((volatile unsigned char *) 0xE000C010))
#define UART0_LSR      (*((volatile unsigned char *) 0xE000C014))
#define UART0_MSR      (*((volatile unsigned char *) 0xE000C018))
#define UART0_SCR      (*((volatile unsigned char *) 0xE000C01C))
#define UART0_DLL      (*((volatile unsigned char *) 0xE000C000))
#define UART0_DLM      (*((volatile unsigned char *) 0xE000C004))

/* Universal Asynchronous Receiver Transmitter 1 (UART1) */
#define UART1_RBR      (*((volatile unsigned char *) 0xE0010000))
#define UART1_THR      (*((volatile unsigned char *) 0xE0010000))
#define UART1_IER      (*((volatile unsigned char *) 0xE0010004))
#define UART1_IIR      (*((volatile unsigned char *) 0xE0010008))
#define UART1_FCR      (*((volatile unsigned char *) 0xE0010008))
#define UART1_LCR      (*((volatile unsigned char *) 0xE001000C))
#define UART1_MCR      (*((volatile unsigned char *) 0xE0010010))
#define UART1_LSR      (*((volatile unsigned char *) 0xE0010014))
#define UART1_MSR      (*((volatile unsigned char *) 0xE0010018))
#define UART1_SCR      (*((volatile unsigned char *) 0xE001001C))
#define UART1_DLL      (*((volatile unsigned char *) 0xE0010000))
#define UART1_DLM      (*((volatile unsigned char *) 0xE0010004))

/* I2C Interface */
#define I2C_I2CONSET   (*((volatile unsigned char *) 0xE001C000))
#define I2C_I2STAT     (*((volatile unsigned char *) 0xE001C004))
#define I2C_I2DAT      (*((volatile unsigned char *) 0xE001C008))
#define I2C_I2ADR      (*((volatile unsigned char *) 0xE001C00C))
#define I2C_I2SCLH     (*((volatile unsigned short*) 0xE001C010))
#define I2C_I2SCLL     (*((volatile unsigned short*) 0xE001C014))
#define I2C_I2CONCLR   (*((volatile unsigned char *) 0xE001C018))

/* SPI0 (Serial Peripheral Interface 0) */
#define SPI0_SPCR      (*((volatile unsigned char *) 0xE0020000))
#define SPI0_SPSR      (*((volatile unsigned char *) 0xE0020004))
#define SPI0_SPDR      (*((volatile unsigned char *) 0xE0020008))
#define SPI0_SPCCR     (*((volatile unsigned char *) 0xE002000C))
#define SPI0_SPTCR     (*((volatile unsigned char *) 0xE0020010))
#define SPI0_SPTSR     (*((volatile unsigned char *) 0xE0020014))
#define SPI0_SPTOR     (*((volatile unsigned char *) 0xE0020018))
#define SPI0_SPINT     (*((volatile unsigned char *) 0xE002001C))

/* SPI1 (Serial Peripheral Interface 1) */
#define SPI1_SPCR      (*((volatile unsigned char *) 0xE0030000))
#define SPI1_SPSR      (*((volatile unsigned char *) 0xE0030004))
#define SPI1_SPDR      (*((volatile unsigned char *) 0xE0030008))
#define SPI1_SPCCR     (*((volatile unsigned char *) 0xE003000C))
#define SPI1_SPTCR     (*((volatile unsigned char *) 0xE0030010))
#define SPI1_SPTSR     (*((volatile unsigned char *) 0xE0030014))
#define SPI1_SPTOR     (*((volatile unsigned char *) 0xE0030018))
#define SPI1_SPINT     (*((volatile unsigned char *) 0xE003001C))

/* Real Time Clock */
#define RTC_ILR        (*((volatile unsigned char *) 0xE0024000))
#define RTC_CTC        (*((volatile unsigned short*) 0xE0024004))
#define RTC_CCR        (*((volatile unsigned char *) 0xE0024008))
#define RTC_CIIR       (*((volatile unsigned char *) 0xE002400C))
#define RTC_AMR        (*((volatile unsigned char *) 0xE0024010))
#define RTC_CTIME0     (*((volatile unsigned long *) 0xE0024014))
#define RTC_CTIME1     (*((volatile unsigned long *) 0xE0024018))
#define RTC_CTIME2     (*((volatile unsigned long *) 0xE002401C))
#define RTC_SEC        (*((volatile unsigned char *) 0xE0024020))
#define RTC_MIN        (*((volatile unsigned char *) 0xE0024024))
#define RTC_HOUR       (*((volatile unsigned char *) 0xE0024028))
#define RTC_DOM        (*((volatile unsigned char *) 0xE002402C))
#define RTC_DOW        (*((volatile unsigned char *) 0xE0024030))
#define RTC_DOY        (*((volatile unsigned short*) 0xE0024034))
#define RTC_MONTH      (*((volatile unsigned char *) 0xE0024038))
#define RTC_YEAR       (*((volatile unsigned short*) 0xE002403C))
#define RTC_ALSEC      (*((volatile unsigned char *) 0xE0024060))
#define RTC_ALMIN      (*((volatile unsigned char *) 0xE0024064))
#define RTC_ALHOUR     (*((volatile unsigned char *) 0xE0024068))
#define RTC_ALDOM      (*((volatile unsigned char *) 0xE002406C))
#define RTC_ALDOW      (*((volatile unsigned char *) 0xE0024070))
#define RTC_ALDOY      (*((volatile unsigned short*) 0xE0024074))
#define RTC_ALMON      (*((volatile unsigned char *) 0xE0024078))
#define RTC_ALYEAR     (*((volatile unsigned short*) 0xE002407C))
#define RTC_PREINT     (*((volatile unsigned short*) 0xE0024080))
#define RTC_PREFRAC    (*((volatile unsigned short*) 0xE0024084))

/* A/D Converter */
#define ADCR           (*((volatile unsigned long *) 0xE0034000))
#define ADDR           (*((volatile unsigned long *) 0xE0034004))

/* Watchdog */
#define WDMOD          (*((volatile unsigned char *) 0xE0000000))
#define WDTC           (*((volatile unsigned long *) 0xE0000004))
#define WDFEED         (*((volatile unsigned char *) 0xE0000008))
#define WDTV           (*((volatile unsigned long *) 0xE000000C))



#endif  // __LPC23xx_H