📄 start.asm
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#set CS5_CONFIG B'0000011000000000 ; <<< select Chip Select Area 5 configuration
; |||||||||||||+++-- Automatic wait cycles (0: 0, 1: 1, 2: 2, 3: 3, 4: 4, 5: 8, 6: 16, 7: 32)
; ||||||||||||+----- Address Cycle Extension (0: not extended, 1: extension by 1 cycle)
; |||||||||||+------ Strobe timing (0: scheme 0, 1: scheme 1)
; ||||||||||+------- Write strobe function (0: WRLX strobe, 1: WRX strobe)
; |||||||||+-------- Endianess (0: little endian, 1: big endian)
; ||||||||+--------- Bus width (0: 16bit, 1: 8bit)
; |||||+++---------- External area size (0: 64kB, 1: 128kB, 2: 256kB, 3: 512kB, 4: 1MB, 5: 2MB, 6: 4MB, 7: 8MB)
; ||||+------------- Chip Select output enable (0: CS disabled, 1: CS enabled)
; |||+-------------- Chip Select level (0: low active, 1: high active)
; ||+--------------- Access type limitation (0: code and data, 1: data only)
; ++---------------- ignored
#set CS2_START 0x00 ; select start bank of chip select area; valid values: 0x00..0xFF
#set CS3_START 0x40 ; select start bank of chip select area; valid values: 0x00..0xFF
#set CS4_START 0x80 ; select start bank of chip select area; valid values: 0x00..0xFF
#set CS5_START 0xC0 ; select start bank of chip select area; valid values: 0x00..0xFF
;====================================================================
; 4.11 ROM Mirror configuration
;====================================================================
#set MIRROR_8KB 0
#set MIRROR_16KB 1
#set MIRROR_24KB 2
#set MIRROR_32KB 3
#set ROMMIRROR ON ; <<< ROM mirror function ON/OFF
#set MIRROR_BANK 0xF ; <<< ROM Mirror bank, allowed entries: 0x0..0xF for the banks 0xF0..0xFF
#set MIRROR_SIZE MIRROR_32KB ; <<< ROM Mirror size
; One can select which ROM area to mirror into the upper half of bank 00.
; If ROMMIRROR = OFF is selected, the address range 0x008000..0x00FFFF
; shows the contents of the respective area of bank 1: 0x018000..0x01FFFF.
; If ROMMIRROR = ON is selected, the memory bank to mirror can be selected.
; Available banks are 0xF0 to 0xFF. Furthermore, the ROM Mirror area size can
; be selected. 4 sizes are available: 8 kB, 16 kB, 24 kB, or 32 kB. The ROM Mirror
; from the highest address of the selected bank downwards, e.g. if bank 0xFF and
; mirror size 24 kB is selected, the memory range 0xFFA000..0xFFFFFF is mirrored
; to address range 0x00A000..0x00FFFF. The memory area not selected for
; ROM Mirror is still mirrored from bank 0x01.
; This is necessary to get the compiler ROMCONST option working. This is intended
; to increase performance, if a lot of dynamic data have to be accessed.
; In SMALL and MEDIUM model these data can be accessed within bank 0,
; which allows to use near addressing. Please make sure to have the linker
; setting adjusted accordingly!
;====================================================================
; 4.12 Flash Security
;====================================================================
#set MAIN_SECURITY_ENABLE OFF ; <<< enable Flash Security for Main Flash
#set SATELLITE_FLASH OFF ; <<< select if Satellite Flash is available
#set SATELLITE_SECURITY_ENABLE OFF ; <<< enable Flash Security for Satellite Flash
; set the Flash Security unlock key (16 bytes)
; all 0: unlock not possible
#set MAIN_UNLOCK_0 0x00
#set MAIN_UNLOCK_1 0x00
#set MAIN_UNLOCK_2 0x00
#set MAIN_UNLOCK_3 0x00
#set MAIN_UNLOCK_4 0x00
#set MAIN_UNLOCK_5 0x00
#set MAIN_UNLOCK_6 0x00
#set MAIN_UNLOCK_7 0x00
#set MAIN_UNLOCK_8 0x00
#set MAIN_UNLOCK_9 0x00
#set MAIN_UNLOCK_10 0x00
#set MAIN_UNLOCK_11 0x00
#set MAIN_UNLOCK_12 0x00
#set MAIN_UNLOCK_13 0x00
#set MAIN_UNLOCK_14 0x00
#set MAIN_UNLOCK_15 0x00
#set SATELLITE_UNLOCK_0 0x00
#set SATELLITE_UNLOCK_1 0x00
#set SATELLITE_UNLOCK_2 0x00
#set SATELLITE_UNLOCK_3 0x00
#set SATELLITE_UNLOCK_4 0x00
#set SATELLITE_UNLOCK_5 0x00
#set SATELLITE_UNLOCK_6 0x00
#set SATELLITE_UNLOCK_7 0x00
#set SATELLITE_UNLOCK_8 0x00
#set SATELLITE_UNLOCK_9 0x00
#set SATELLITE_UNLOCK_10 0x00
#set SATELLITE_UNLOCK_11 0x00
#set SATELLITE_UNLOCK_12 0x00
#set SATELLITE_UNLOCK_13 0x00
#set SATELLITE_UNLOCK_14 0x00
#set SATELLITE_UNLOCK_15 0x00
;====================================================================
; 4.13 Flash Write Protection
;====================================================================
#set MAIN_FLASH_WRITE_PROTECT OFF ; <<< select Flash write protection
#set PROTECT_SECTOR_SA0 OFF ; <<< select individual sector to protect
#set PROTECT_SECTOR_SA1 OFF ; <<< select individual sector to protect
#set PROTECT_SECTOR_SA2 OFF ; <<< select individual sector to protect
#set PROTECT_SECTOR_SA3 OFF ; <<< select individual sector to protect
#set PROTECT_SECTOR_SA32 OFF ; <<< select individual sector to protect
#set PROTECT_SECTOR_SA33 OFF ; <<< select individual sector to protect
#set PROTECT_SECTOR_SA34 OFF ; <<< select individual sector to protect
#set PROTECT_SECTOR_SA35 OFF ; <<< select individual sector to protect
#set PROTECT_SECTOR_SA36 OFF ; <<< select individual sector to protect
#set PROTECT_SECTOR_SA37 OFF ; <<< select individual sector to protect
#set PROTECT_SECTOR_SA38 OFF ; <<< select individual sector to protect
#set PROTECT_SECTOR_SA39 OFF ; <<< select individual sector to protect
#set SATELLITE_FLASH_WRITE_PROTECT OFF ; <<< select Flash write protection
#set PROTECT_SECTOR_SB0 OFF ; <<< select individual sector to protect
#set PROTECT_SECTOR_SB1 OFF ; <<< select individual sector to protect
#set PROTECT_SECTOR_SB2 OFF ; <<< select individual sector to protect
#set PROTECT_SECTOR_SB3 OFF ; <<< select individual sector to protect
;====================================================================
; 4.14 Boot Vector
;====================================================================
#set BOOT_VECTOR_TABLE 1 ; enable boot vector
#set BOOT_VECTOR_FIXED 2 ; enable boot vector
#set BOOT_VECTOR BOOT_VECTOR_TABLE ; <<< select type of boot vector
; If boot vector generation is enabled (BOOT_VECTOR_TABLE, BOOT_VECTOR_FIXED),
; appropriate code is generated. If it is disabled (OFF), start-up file does
; not care about.
;
; BOOT_VECTOR_TABLE: - Create table entry at address oxFFFFDC.
; - Any start address can be set and start-up file will
; set address of this start code.
; BOOT_VECTOR_FIXED: - Instead of table entry, a special marker is set in
; ROM Configuration Block, which enables the fixed
; start address 0xDF0080. This is prefered setting
; for user boot loaders.
; OFF: - Do not set table entry and marker. This might be used
; for application to be loaded by boot loader.
;
; Note
; BOOT_VECTOR_TABLE setting can also be used, if all other interrupt vectors
; are specified via "pragma intvect". Only if interrupts 0..7 are specified
; via "pragma intvect", these will conflict with the vector in this module.
; The reason is the INTVECT section, which includes the whole area from the
; lowest to the highest specified vector.
#if BOOT_VECTOR == BOOT_VECTOR_TABLE
.SECTION RESVECT, CONST, LOCATE=H'FFFFDC
.DATA.E _start
.SECTION BOOT_SELECT, CONST, LOCATE=H'DF0030
.DATA.L 0xFFFFFFFF
#else
# if BOOT_VECTOR == BOOT_VECTOR_FIXED
.SECTION BOOT_SELECT, CONST, LOCATE=H'DF0030
.DATA.L 0x292D3A7B ; Magic Word
# else
.SECTION BOOT_SELECT, CONST, LOCATE=H'DF0030
.SKIP 4
# endif
#endif
;====================================================================
; 4.15 UART scanning
;====================================================================
#set UART_SCANNING OFF ; <<< enable UART scanning in
; Internal Vector Mode
;
; By default, the MCU scans in Internal Vector Mode for a UART
; communication after reset. This enables to establish a serial
; communication without switching to Serial Communication Mode.
; For the final aplpication, sset this switch to OFF to achieve the
; fastest start-up time.
#if UART_SCANNING == ON
.SECTION UART_SCAN_SELECT, CONST, LOCATE=H'DF0034
.DATA.L 0xFFFFFFFF
#else
.SECTION UART_SCAN_SELECT, CONST, LOCATE=H'DF0034
.DATA.L 0x292D3A7B
#endif
.SKIP 0x08
;====================================================================
; 4.16 Enable RAMCODE Copying
;====================================================================
#set COPY_RAMCODE OFF ; <<< enable RAMCODE section to
; be copied from ROM to RAM
; To get this option properly working the code to be executed has to
; be linked to section RAMCODE (e.g. by #pragma section). The section
; RAMCODE has be located in RAM and the section @RAMCODE has to be
; located at a fixed address in ROM by linker settings.
;====================================================================
; 4.17 Enable information stamp in ROM
;====================================================================
#set VERSION_STAMP OFF ; <<< enable version number in
; separated section
#if VERSION_STAMP == ON
.SECTION VERSIONS, CONST ; change name, if necessary
.SDATA "Start ", VERSION, "\n\0"
#endif
;====================================================================
; 4.18 Enable Background Debugging Mode
;====================================================================
#set BACKGROUND_DEBUGGING ON ; <<< enable Background Debugging
; mode
#if __CONFIG__ == 1
#set BDM_CONFIGURATION B'0000000000010001 ; <<< set BDM configuration
; ||||||||++--- BdmUART
; |||||||| (0: A, 1: B, 2: C, 3: D)
; ||||||++----- BdmSynchMode
; |||||| (0: Async., 1: Sync.
; |||||| 2: BdmKLine, 3: res.)
; |||||+------- BdmAutoStart
; ||||+-------- BdmExtBreakpointCfg
; |||+--------- BdmKeepRClock
; ||+---------- BdmCaliRClock
; |+----------- BdmKeepBCD
; +------------ BdmUserKernel
#elif __CONFIG__ == 2
#set BDM_CONFIGURATION B'0000000000010000 ; <<< set BDM configuration
; ||||||||++--- BdmUART
; |||||||| (0: A, 1: B, 2: C, 3: D)
; ||||||++----- BdmSynchMode
; |||||| (0: Async., 1: Sync.
; |||||| 2: BdmKLine, 3: res.)
; |||||+------- BdmAutoStart
; ||||+-------- BdmExtBreakpointCfg
; |||+--------- BdmKeepRClock
; ||+---------- BdmCaliRClock
; |+----------- BdmKeepBCD
; +------------ BdmUserKernel
#elif __CONFIG__ == 3
#set BDM_CONFIGURATION B'0000000000010001 ; <<< set BDM configuration
; ||||||||++--- BdmUART
; |||||||| (0: A, 1: B, 2: C, 3: D)
; ||||||++----- BdmSynchMode
; |||||| (0: Async., 1: Sync.
; |||||| 2: BdmKLine, 3: res.)
; |||||+------- BdmAutoStart
; ||||+-------- BdmExtBreakpointCfg
; |||+--------- BdmKeepRClock
; ||+---------- BdmCaliRClock
; |+----------- BdmKeepBCD
; +------------ BdmUserKernel
#elif __CONFIG__ == 4
#set BDM_CONFIGURATION B'0000000000010000 ; <<< set BDM configuration
; ||||||||++--- BdmUART
; |||||||| (0: A, 1: B, 2: C, 3: D)
; ||||||++----- BdmSynchMode
; |||||| (0: Async., 1: Sync.
; |||||| 2: BdmKLine, 3: res.)
; |||||+------- BdmAutoStart
; ||||+-------- BdmExtBreakpointCfg
; |||+--------- BdmKeepRClock
; ||+---------- BdmCaliRClock
; |+----------- BdmKeepBCD
; +------------ BdmUserKernel
#else
#error Either of the __USE_COMTEST__ and __USE_TASKLIST__ should be defined
#endif
#set BDM_BAUDRATE 115200 ; <<< set Baudrate in Bits/s for BDM
#set BDM_EXT_CONFIG 0xFFFFFF ; <<< set external Config/Kernel
#set BDM_WD_PATTERN 0x00 ; <<< set watchdog pattern
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