start.asm

FreeRTOS is a portable, open source, mini Real Time Kernel - a free to download and royalty free RTO

; ter from function caller to callee.  The standard method of FCC907S
; compiler  uses  "stack argument passing".  Alternatively,  language
; tools can be configured for "register argument passing".
; For details see the compiler manual.
; This start-up file is compatible to both interfaces.

;====================================================================
; 4.4  Constant Data Handling
;====================================================================

#set      ROMCONST    0            ; works only with compiler ROMCONST
#set      RAMCONST    1            ; works with BOTH compiler settings
#set      AUTOCONST   RAMCONST     ; works with BOTH compiler settings
                              
#set      CONSTDATA   AUTOCONST    ; <<< set RAM/ROM/AUTOCONST

; - AUTOCONST (default) is the same as RAMCONST
; - RAMCONST/AUTOCONST should always work, even if compiler is set to
;   ROMCONST. If compiler is set to ROMCONST and this startup file is
;   set to RAMCONST or AUTOCONST, this startup file will generate an
;   empty section CINIT in RAM. However, the code, which copies from 
;   CONST to CINIT will not have any effect, because size of section is 0.
; - It is highly recommended to set the compiler to ROMCONST for 
;   single-chip mode or internal ROM+ext bus. The start-up file 
;   should be set to AUTOCONST.
; - ROMCONST setting on systems with full external bus requires exter-
;   nal address mapping.
;   Single-chip can be emulated by the emulator debugger.
;   ROM mirror can also be used with simulator.
;
; see also ROM MIRROR options 

;====================================================================
; 4.5  Stack Type and Stack Size
;====================================================================

#set      USRSTACK      0       ; user stack: for main program
#set      SYSSTACK      1       ; system stack: for main program and interrupts

#set      STACKUSE  SYSSTACK    ; <<< set active stack

#set      STACK_RESERVE  ON     ; <<< reserve stack area in this module
#set      STACK_SYS_SIZE 1500   ; <<< byte size of System stack
#set      STACK_USR_SIZE 2      ; <<< byte size of User stack 

#set      STACK_FILL    ON      ; <<< fills the stack area with pattern
#set      STACK_PATTERN 0x55AA  ; <<< the pattern to write to stack

; - If the active stack is set to SYSSTACK, it is used for main program
;   and interrupts. In this case, the user stack can be set to a dummy
;   size.
;   If the active stack is set to user stack, it is used for the main
;   program but the system stack is automatically activated, if an inter-
;   rupt is serviced. Both stack areas must have a reasonable size.
; - If STACK_RESERVE is ON, the sections USTACK and SSTACK are reserved 
;   in this module. Otherwise, they have to be reserved in other modules.
;   If STACK_RESERVE is OFF, the size definitions STACK_SYS_SIZE and 
;   STACK_USR_SIZE have no meaning.
; - Even if they are reserved in other modules, they are still initialised
;   in this start-up file.
; - Filling the stack with a pattern allows to dynamically check the stack 
;   area, which had already been used.
;
; - If only system stack is used and SSB is linked to a different bank
;   than USB, make sure that all C-modules (which generate far pointers 
;   to stack data) have "#pragma SSB". Applies only to exclusive confi-
;   gurations.
; - Note, several library functions require quite a big stack (due to 
;   ANSI). Check the stack information files (*.stk) in the LIB\907
;   directory.

;====================================================================
; 4.6  General Register Bank
;====================================================================

#set      REGBANK   0           ; <<< set default register bank

; set the General Register Bank that is to be used after startup.
; Usually, this is bank 0, which applies to address H'180..H'18F. Set
; in the range from 0 to 31.
; Note: All used register banks have to be reserved (linker options).

#if REGBANK > 31 || REGBANK < 0
#  error REGBANK setting out of range
#endif

;====================================================================
; 4.7  Low-Level Library Interface
;====================================================================

#set      CLIBINIT  OFF         ; <<< select extended library usage

; This option has only to be set, if stream-IO/standard-IO function of
; the C-library have to be used (printf(), fopen()...). This also 
; requires low-level functions to be defined by the application 
; software.
; For other library functions (like e.g. sprintf()) all this is not
; necessary. However, several functions consume a large amount of stack.

;====================================================================
; 4.8  Clock Selection
;====================================================================

; The clock selection requires that a 4 MHz external clock is provided
; as the Main Clock. If a different frequency is used, the Flash Memory
; Timing settings must be checked!

#set      CLOCKWAIT      ON     ; <<< wait for stabilized clock, if
                                ;     Main Clock or PLL is used

; The clock is set quite early. However, if CLOCKWAIT is ON, polling 
; for machine clock to be switched to Main Clock or PLL is done at 
; the end of this file. Therefore, the stabilization time is not 
; wasted. Main() will finally start at correct speed. Resources can 
; be used immediately.
; Note: Some frequency settings (below) necessarily need a stabilized
; PLL for final settings. In these cases, the CLOCKWAIT setting above 
; does not have any effect.
;
; This startup file version does not support subclock.

#set      FREQ_4MHZ       D'4000000L
#set      FREQ_8MHZ       D'8000000L

#set      CRYSTAL         FREQ_4MHZ  ; <<< select external crystal frequency

#set      CPU_4MHZ_MAIN_CLKP2_4MHZ            0x0004
#set      CPU_4MHZ_PLL_CLKP2_4MHZ             0x0104
#set      CPU_8MHZ_CLKP2_8MHZ                 0x0108
#set      CPU_12MHZ_CLKP2_12MHZ               0x010C
#set      CPU_16MHZ_CLKP2_16MHZ               0x0110
#set      CPU_24MHZ_CLKP2_12MHZ               0x0118
#set      CPU_32MHZ_CLKP2_16MHZ               0x0120
#set      CPU_32MHZ_CLKP1_16MHZ_CLKP2_16MHZ   0x0220
#set      CPU_48MHZ_CLKP2_16MHZ               0x0130
#set      CPU_56MHZ_CLKP2_14MHZ               0x0138

#set      CLOCK_SPEED     CPU_56MHZ_CLKP2_14MHZ              ; <<< set clock speeds

; The peripheral clock CLKP1 is set to the same frequency than the CPU.
; The peripheral clock CLKP2 has its setting. This is because it
; feeds only the CAN controllers and Sound Generators. These do not
; need high frequency clocks.

;====================================================================
; 4.9  Clock Stabilization Time
;====================================================================

#set      MC_2_10_CYCLES   0
#set      MC_2_12_CYCLES   1
#set      MC_2_13_CYCLES   2
#set      MC_2_14_CYCLES   3
#set      MC_2_15_CYCLES   4
#set      MC_2_16_CYCLES   5
#set      MC_2_17_CYCLES   6
#set      MC_2_18_CYCLES   7

#set      MC_STAB_TIME    MC_2_15_CYCLES  ; <<< select Main Clock Stabilization Time

;====================================================================
; 4.10 External Bus Interface
;====================================================================

#set      SINGLE_CHIP    0         ; all internal
#set      INTROM_EXTBUS  1         ; mask ROM or FLASH memory used
#set      EXTROM_EXTBUS  2         ; full external bus (INROM not used) 

#set      BUSMODE SINGLE_CHIP      ; <<< set bus mode (see mode pins)

#set      MULTIPLEXED     0        ; 
#set      NON_MULTIPLEXED 1        ; only if supported by the device

#set      ADDRESSMODE MULTIPLEXED  ; <<< set address-mode

; Some devices support multiplexed and/or non-multiplexed Bus mode
; please refer to the related datasheet/hardwaremanual


; If BUSMODE is "SINGLE_CHIP", ignore remaining bus settings.

; Select the used Chip Select areas
#set      CHIP_SELECT0    OFF      ; <<< enable chip select area
#set      CHIP_SELECT1    OFF      ; <<< enable chip select area
#set      CHIP_SELECT2    OFF      ; <<< enable chip select area
#set      CHIP_SELECT3    OFF      ; <<< enable chip select area
#set      CHIP_SELECT4    OFF      ; <<< enable chip select area
#set      CHIP_SELECT5    OFF      ; <<< enable chip select area

#set      HOLD_REQ           OFF   ; <<< select Hold function
#set      EXT_READY          OFF   ; <<< select external Ready function
#set      EXT_CLOCK_ENABLE   OFF   ; <<< select external bus clock output
#set      EXT_CLOCK_INVERT   OFF   ; <<< select clock inversion
#set      EXT_CLOCK_SUSPEND  OFF   ; <<< select if external clock is suspended when no transfer in progress

; The external bus clock is derived from core clock CLKB. Select the divider for the external bus clock.

#set      EXT_CLOCK_DIV1     0
#set      EXT_CLOCK_DIV2     1
#set      EXT_CLOCK_DIV4     2
#set      EXT_CLOCK_DIV8     3
#set      EXT_CLOCK_DIV16    4
#set      EXT_CLOCK_DIV32    5
#set      EXT_CLOCK_DIV64    6
#set      EXT_CLOCK_DIV128   7

#set      EXT_CLOCK_DIVISION  EXT_CLOCK_DIV1 ; <<< select clock divider

#set      ADDR_PINS_23_16    B'00000000     ; <<< select used address lines 
                                            ;     A23..A16 to be output.
#set      ADDR_PINS_15_8     B'00000000     ; <<< select used address lines 
                                            ;     A15..A8 to be output.
#set      ADDR_PINS_7_0      B'00000000     ; <<< select used address lines 
                                            ;     A7..A0 to be output.

#set      LOW_BYTE_SIGNAL    OFF   ; select low byte signal LBX
#set      HIGH_BYTE_SIGNAL   OFF   ; select high byte signal UBX
#set      LOW_WRITE_STROBE   OFF   ; select write strobe signal WRLX/WRX
#set      HIGH_WRITE_STROBE  OFF   ; select write strobe signal WRHX
#set      READ_STROBE        OFF   ; select read strobe signal RDX
#set      ADDRESS_STROBE     OFF   ; select address strobe signal ALE/ASX
#set      ADDRESS_STROBE_LVL OFF   ; select address strobe function: OFF - active low; ON - active high


#set      CS0_CONFIG  B'0000000000000000    ; <<< select Chip Select Area 0 configuration
;                       |||||||||||||+++-- Automatic wait cycles (0: 0, 1: 1, 2: 2, 3: 3, 4: 4, 5: 8, 6: 16, 7: 32)
;                       ||||||||||||+----- Address Cycle Extension (0: not extended, 1: extension by 1 cycle)
;                       |||||||||||+------ Strobe timing (0: scheme 0, 1: scheme 1)
;                       ||||||||||+------- Write strobe function (0: WRLX strobe, 1: WRX strobe)
;                       |||||||||+-------- Endianess (0: little endian, 1: big endian)
;                       ||||||||+--------- Bus width (0: 16bit, 1: 8bit)
;                       |||||+++---------- ignored
;                       ||||+------------- Chip Select output enable (0: CS disabled, 1: CS enabled)
;                       |||+-------------- Chip Select level (0: low active, 1: high active)
;                       ||+--------------- Access type limitation (0: code and data, 1: data only)
;                       ++---------------- ignored

#set      CS1_CONFIG  B'0000000000000000    ; <<< select Chip Select Area 1 configuration
;                       |||||||||||||+++-- Automatic wait cycles (0: 0, 1: 1, 2: 2, 3: 3, 4: 4, 5: 8, 6: 16, 7: 32)
;                       ||||||||||||+----- Address Cycle Extension (0: not extended, 1: extension by 1 cycle)
;                       |||||||||||+------ Strobe timing (0: scheme 0, 1: scheme 1)
;                       ||||||||||+------- Write strobe function (0: WRLX strobe, 1: WRX strobe)
;                       |||||||||+-------- Endianess (0: little endian, 1: big endian)
;                       ||||||||+--------- Bus width (0: 16bit, 1: 8bit)
;                       |||||+++---------- ignored
;                       ||||+------------- Chip Select output enable (0: CS disabled, 1: CS enabled)
;                       |||+-------------- Chip Select level (0: low active, 1: high active)
;                       ||+--------------- Access type limitation (0: code and data, 1: data only)
;                       ++---------------- ignored

#set      CS2_CONFIG  B'0000011000000000    ; <<< select Chip Select Area 2 configuration
;                       |||||||||||||+++-- Automatic wait cycles (0: 0, 1: 1, 2: 2, 3: 3, 4: 4, 5: 8, 6: 16, 7: 32)
;                       ||||||||||||+----- Address Cycle Extension (0: not extended, 1: extension by 1 cycle)
;                       |||||||||||+------ Strobe timing (0: scheme 0, 1: scheme 1)
;                       ||||||||||+------- Write strobe function (0: WRLX strobe, 1: WRX strobe)
;                       |||||||||+-------- Endianess (0: little endian, 1: big endian)
;                       ||||||||+--------- Bus width (0: 16bit, 1: 8bit)
;                       |||||+++---------- External area size (0: 64kB, 1: 128kB, 2: 256kB, 3: 512kB, 4: 1MB, 5: 2MB, 6: 4MB, 7: 8MB)
;                       ||||+------------- Chip Select output enable (0: CS disabled, 1: CS enabled)
;                       |||+-------------- Chip Select level (0: low active, 1: high active)
;                       ||+--------------- Access type limitation (0: code and data, 1: data only)
;                       ++---------------- ignored

#set      CS3_CONFIG  B'0000011000000000    ; <<< select Chip Select Area 3 configuration
;                       |||||||||||||+++-- Automatic wait cycles (0: 0, 1: 1, 2: 2, 3: 3, 4: 4, 5: 8, 6: 16, 7: 32)
;                       ||||||||||||+----- Address Cycle Extension (0: not extended, 1: extension by 1 cycle)
;                       |||||||||||+------ Strobe timing (0: scheme 0, 1: scheme 1)
;                       ||||||||||+------- Write strobe function (0: WRLX strobe, 1: WRX strobe)
;                       |||||||||+-------- Endianess (0: little endian, 1: big endian)
;                       ||||||||+--------- Bus width (0: 16bit, 1: 8bit)
;                       |||||+++---------- External area size (0: 64kB, 1: 128kB, 2: 256kB, 3: 512kB, 4: 1MB, 5: 2MB, 6: 4MB, 7: 8MB)
;                       ||||+------------- Chip Select output enable (0: CS disabled, 1: CS enabled)
;                       |||+-------------- Chip Select level (0: low active, 1: high active)
;                       ||+--------------- Access type limitation (0: code and data, 1: data only)
;                       ++---------------- ignored

#set      CS4_CONFIG  B'0000011000000000    ; <<< select Chip Select Area 4 configuration
;                       |||||||||||||+++-- Automatic wait cycles (0: 0, 1: 1, 2: 2, 3: 3, 4: 4, 5: 8, 6: 16, 7: 32)
;                       ||||||||||||+----- Address Cycle Extension (0: not extended, 1: extension by 1 cycle)
;                       |||||||||||+------ Strobe timing (0: scheme 0, 1: scheme 1)
;                       ||||||||||+------- Write strobe function (0: WRLX strobe, 1: WRX strobe)
;                       |||||||||+-------- Endianess (0: little endian, 1: big endian)
;                       ||||||||+--------- Bus width (0: 16bit, 1: 8bit)
;                       |||||+++---------- External area size (0: 64kB, 1: 128kB, 2: 256kB, 3: 512kB, 4: 1MB, 5: 2MB, 6: 4MB, 7: 8MB)
;                       ||||+------------- Chip Select output enable (0: CS disabled, 1: CS enabled)
;                       |||+-------------- Chip Select level (0: low active, 1: high active)
;                       ||+--------------- Access type limitation (0: code and data, 1: data only)
;                       ++---------------- ignored