start.asm

FreeRTOS is a portable, open source, mini Real Time Kernel - a free to download and royalty free RTO

;====================================================================
; THIS SAMPLE CODE IS PROVIDED AS IS AND IS SUBJECT TO ALTERATIONS.  
;  FUJITSU MICROELECTRONICS ACCEPTS NO RESPONSIBILITY OR LIABILITY   
;         FOR ANY ERRORS OR ELIGIBILITY FOR ANY PURPOSES.            
;                                                                    
;    Startup file for memory and basic controller initialisation     
;                                                                    
;    MB96300 Family C Compiler
;                                                                    
;    (C) FUJITSU MICROELECTRONICS EUROPE 1998-2008                   
;====================================================================

          .PROGRAM  STARTUP  
          .TITLE    "STARTUP FILE FOR MEMORY INITIALISATION"

;====================================================================
; 1  Contents
;====================================================================
; 1   Contents
; 2   Disclaimer
; 3   History
;
; 4   SETTINGS              (USER INTERFACE)
; 4.1  Controller Series
; 4.2   C-language Memory model
; 4.3   Function-Call Interface
; 4.4   Constant Data Handling
; 4.5   Stack Type and Stack Size
; 4.6   General Register Bank
; 4.7   Low-Level Library Interface
; 4.8   Clock Selection
; 4.9   Clock Stabilization Time
; 4.10  External Bus Interface
; 4.11  ROM Mirror configuration
; 4.12  Flash Security
; 4.13  Flash Write Protection
; 4.14  Boot Vector
; 4.15  UART scanning
; 4.16  Enable RAMCODE Copying
; 4.17  Enable information stamp in ROM
; 4.18  Enable Background Debugging Mode
;
; 5   Section and Data Declaration
; 5.1   Several fixed addresses (fixed for MB963xx controllers)
; 5.2   Declaration of __near addressed data sections
; 5.3   Declaration of RAMCODE section and labels
; 5.4   Declaration of sections containing other sections description
; 5.5   Stack area and stack top definition/declaration
; 5.6   Direct page register dummy label definition
;
; 6   Start-Up Code
; 6.1   Import external symbols
; 6.2   Program start (the boot vector should point here)
; 6.3   "NOT RESET YET" WARNING
; 6.4   Initialisation of processor status
; 6.5   Set clock ratio (ignore subclock)
; 6.6   Set external bus configuration
; 6.7   Prepare stacks and set the active stack type
; 6.8   Copy initial values to data areas
; 6.9   Clear uninitialised data areas to zero
; 6.10  Set Data Bank Register (DTB) and Direct Page Register (DPR)
; 6.11  Wait for PLL to stabilise
; 6.12  Initialise Low-Level Library Interface
; 6.13  Call C-language main function
; 6.14  Shut down library
; 6.15  Program end loop
; 6.16  Set Flash Security
; 6.17  Set Flash write protection
; 6.18  Debug address specification
;
;====================================================================
; 2  Disclaimer
;====================================================================
;                  FUJITSU MICROELECTRONICS EUROPE GMBH
;                  Pittlerstrasse 47, 63225 Langen, Germany 
;                  Tel.:++49 6103 690-0, Fax -122
;                                                               
;    The following software is for demonstration purposes only. 
;    It is not fully tested, nor validated in order to fulfil 
;    its task under all circumstances. Therefore, this software 
;    or any part of it must only be used in an evaluation       
;    laboratory environment.                                    
;    This software is subject to the rules of our standard      
;    DISCLAIMER, that is delivered with our SW-tools on the 
;    Fujitsu Microcontrollers CD (V3.4 or higher "\START.HTM") or
;    on our Internet Pages:                                      
;    http://www.fme.gsdc.de/gsdc.htm
;    http://emea.fujitsu.com/microelectronics 
;
;====================================================================
; 3  History
;====================================================================
; $Id: START.ASM,v 1.25 2007/09/28 07:33:18 mcuae Exp $


#define VERSION  "1.25"
/*
$Log: START.ASM,v $
Revision 1.25  2007/09/28 07:33:18  mcuae
Bug in BDM baudrate calculation corrected

Revision 1.24  2007/09/26 14:03:08  mcuae
- Device list for MB96340 series updated and expanded

Revision 1.23  2007/08/06 14:48:16  mcuae
- BDM section always reserved, filled with 0xFF, if not configured

Revision 1.22  2007/08/02 08:34:03  mcuae
- communication mode bits of BDM configuration grouped

Revision 1.21  2007/07/13 08:23:05  mwilla
device selection for BDM baud rate improved

Revision 1.20  2007/06/12 10:43:57  mwilla
- BDM-Baud-Rate calculation includes crystal frequency

Revision 1.19  2007/06/06 07:46:55  mwilla
- add Background Debugging Configuration
- Stack initialization moved before variable initialization
- values of cystal frequency and device macros changed

Revision 1.18  2007/04/16 07:56:02  phuene
- update clock settings when crystal is 8 MHz so that the CLKVCO is low

Revision 1.17  2007/04/10 11:30:43  phuene
- add MB96320 Series
- Clock settings optimized for CPU_8MHZ_CLKP2_8MHZ, CPU_12MHZ_CLKP2_12MHZ, CPU_16MHZ_CLKP2_16MHZ, CPU_24MHZ_CLKP2_24MHZ, CPU_32MHZ_CLKP2_32MHZ
- make the selection for the individual devices also consider the selected Series
- support 8 MHz crystal
- add clock setting CPU_32MHZ_CLKP1_16MHZ_CLKP2_16MHZ
- prohibit CPU_32MHZ_CLKP2_16MHZ, CPU_CLKP1_16MHZ_CLKP2_16MHZ for MB96F348H and MB96F348T according to functional limitation 16FXFL0014

Revision 1.16  2007/02/07 12:38:10  phuene
- support disabling the UART scanning in Internal Vector Mode
- distinguish between Reset Vector and Boot Vector: the Boot Vector points to the start of the user application

Revision 1.15  2007/02/07 09:00:19  phuene
- add .SKIP instructions to occupy the whole ROM configuration block area

Revision 1.14  2007/01/29 13:15:06  phuene
- fix CPU_4MHZ_MAIN_CLKP2_4MHZ clock setting

Revision 1.13  2007/01/03 10:40:14  phuene
- change clock setting CPU_24MHZ_CLKP2_16MHZ to CPU_24MHZ_CLKP2_12MHZ; this allows for better performance of MB96F348H/T
- use additional preprocessor statements to avoid checking for PLL ready twice in some cases

Revision 1.12  2007/01/02 10:16:20  phuene
- correct CLKP2 (CAN) clock for CPU_32MHZ and MB96F348H/T
- correct CLKP2 (CAN) clock for CPU_24MHZ for all other devices than MB96F348H/T

Revision 1.11  2006/12/28 10:49:52  phuene
- corrected PLL setting for CPU_16MHZ for MB96348H, MB96348T

Revision 1.10  2006/12/28 08:41:57  phuene
- correct revision number at new location

Revision 1.1  2006/12/28 07:20:01  phuene
- new location in CVS

Revision 1.9  2006/12/27 13:00:45  phuene
- add support for ROM Mirror when using the Simulator
- add support for 16FXFL0022, 16FXFL0023

Revision 1.8  2006/12/11 16:43:37  phuene
- fix typo

Revision 1.7  2006/12/11 16:35:08  phuene
- add setting for Clock Stabilization Times
- modify clock settings:
  - CLKP2 < 28 MHz
  - remove clock settings using more wait cycles than absolutely required

Revision 1.6  2006/11/03 13:38:45  phuene
- modify clock settings to also set the Flash Memory Timing
- add support for both parameter passing models

Revision 1.5  2006/08/07 14:01:44  phuene
- change default clock setting to PLLx4 for CLKS1, CLKS2
- correct clock setting
- disable Flash Security by default for Main Flash, Satellite Flash
- disable availability of Satellite Flash by default

Revision 0.1  2006/01/25 15:37:46  phu
- initial version based on start.asm for MB90340 Series, version 3.8
Revision 0.2  2006/07/14 15:37:46  phu
- include PIER settings for External Bus operation
Revision 0.3  2006/07/14 15:37:46  phu
- add MB96350 Series
- correct PIER settings for HRQ and RDY signals
Revision 0.4  2006/08/07 15:35:35  phu
- change default clock setting to PLLx4 for CLKS1, CLKS2
- correct clock setting
- disable Flash Security by default for Main Flash, Satellite Flash
- disable availability of Satellite Flash by default
*/
;====================================================================

;====================================================================
; 4  Settings
;====================================================================
;
; CHECK ALL OPTIONS WHETHER THEY FIT TO THE APPLICATION
;
; Configure this startup file in the "Settings" section. Search for
; comments with leading "; <<<". This points to the items to be set.
;====================================================================
#set      OFF       0
#set      ON        1

;====================================================================
; 4.1  Controller Series, Device
;====================================================================

#set      MB96320   0
#set      MB96340   1
#set      MB96350   2
#set      MB96360   3
#set      MB96380   4

#set      SERIES    MB96340        ; <<< select Series


; Only if SERIES = MB96340 was selected, please specify the device
; according to the following selection
; Note: Do not change order because of device number dependency in
; 6.5 Clock settings and 6.18 Debug address specification!
#set      MB96348HA  1
#set      MB96348TA  2
#set      MB96346RA  3
#set      MB96346YA  4
#set      MB96346AA  5
#set      MB96347RA  6
#set      MB96347YA  7
#set      MB96347AA  8
#set      MB96348RA  9
#set      MB96348YA  10
#set      MB96348AA  11
#set      MB96346RB  12
#set      MB96346AB  13
#set      MB96346YB  14
#set      MB96347RB  15
#set      MB96347AB  16
#set      MB96347YB  17
#set      MB96348CA  18
#set      MB96348HB  19
#set      MB96348TB  20
#set      MB96348RB  21
#set      MB96348AB  22
#set      MB96348YB  23
#set      MB96348CC  24
#set      MB96348HC  25
#set      MB96348TC  26

#set      DEVICE    MB96348HB      ; <<< select device if Series = MB96340

;====================================================================
; 4.2  C-language Memory model
;====================================================================

                                   ;      data      code   
#set      SMALL     0              ;     16 Bit    16 Bit
#set      MEDIUM    1              ;     16 Bit    24 Bit
#set      COMPACT   2              ;     24 Bit    16 Bit
#set      LARGE     3              ;     24 Bit    24 Bit
#set      AUTOMODEL 4              ; works always, might occupy two
                                   ; additional bytes


#set      MEMMODEL  AUTOMODEL      ; <<< C-memory model

; The selected memory model should be set in order to fit to the
; model selected for the compiler. 
; Note, in this startup version AUTOMODEL will work for all
; C-models. However, if the compiler is configured for SMALL or
; COMPACT, two additional bytes on stack are occupied. If this is not
; acceptable, the above setting should be set to the correct model.

;====================================================================
; 4.3  Function-Call Interface
;====================================================================
          #if __REG_PASS__
            .REG_PASS
          #endif

; Above statement informs Assembler on compatibility of start-up code
; to  Function Call Interface  as selected for the application. There
; is nothing to configure.
; The Function-Call Interface specifies the method of passing parame-