crt0_str75x_freertos.s

FreeRTOS is a portable, open source, mini Real Time Kernel - a free to download and royalty free RTO

;* Description    : This function used to switch to SYS mode before entering
;*                  the UART1_IRQHandler function located in 75x_it.c.
;*                  Then to return to IRQ mode after the
;*                  UART1_IRQHandler function termination.
;* Input          : none
;* Output         : none
;*******************************************************************************/
UART1IRQHandler:
        IRQ_to_SYS
        BL     UART1_IRQHandler
        SYS_to_IRQ

/*;*******************************************************************************
;* Function Name  : UART0IRQHandler
;* Description    : This function used to switch to SYS mode before entering
;*                  the UART0_IRQHandler function located in 75x_it.c.
;*                  Then to return to IRQ mode after the
;*                  UART0_IRQHandler function termination.
;* Input          : none
;* Output         : none
;********************************************************************************/
UART0IRQHandler:
        IRQ_to_SYS
        BL     UART0_IRQHandler
        SYS_to_IRQ

/*;*******************************************************************************
;* Function Name  : CANIRQHandler
;* Description    : This function used to switch to SYS mode before entering
;*                  the CAN_IRQHandler function located in 75x_it.c.
;*                  Then to return to IRQ mode after the
;*                  CAN_IRQHandler function termination.
;* Input          : none
;* Output         : none
;********************************************************************************/
CANIRQHandler:
        IRQ_to_SYS
        BL     CAN_IRQHandler
        SYS_to_IRQ

/*;*******************************************************************************
;* Function Name  : USB_LPIRQHandler
;* Description    : This function used to switch to SYS mode before entering
;*                  the USB_LP_IRQHandler function located in 75x_it.c.
;*                  Then to return to IRQ mode after the
;*                  USB_LP_IRQHandler function termination.
;* Input          : none
;* Output         : none
;********************************************************************************/
USB_LPIRQHandler:
        IRQ_to_SYS
        BL     USB_LP_IRQHandler
        SYS_to_IRQ

/*;*******************************************************************************
;* Function Name  : USB_HPIRQHandler
;* Description    : This function used to switch to SYS mode before entering
;*                  the USB_HP_IRQHandler function located in 75x_it.c.
;*                  Then to return to IRQ mode after the
;*                  USB_HP_IRQHandler function termination.
;* Input          : none
;* Output         : none
;********************************************************************************/
USB_HPIRQHandler:
        IRQ_to_SYS
        BL     USB_HP_IRQHandler
        SYS_to_IRQ

/*;*******************************************************************************
;* Function Name  : ADCIRQHandler
;* Description    : This function used to switch to SYS mode before entering
;*                  the ADC_IRQHandler function located in 75x_it.c.
;*                  Then to return to IRQ mode after the
;*                  ADC_IRQHandler function termination.
;* Input          : none
;* Output         : none
;********************************************************************************/
ADCIRQHandler:
        IRQ_to_SYS
        BL     ADC_IRQHandler
        SYS_to_IRQ

/*;*******************************************************************************
;* Function Name  : DMAIRQHandler
;* Description    : This function used to switch to SYS mode before entering
;*                  the DMA_IRQHandler function located in 75x_it.c.
;*                  Then to return to IRQ mode after the
;*                  DMA_IRQHandler function termination.
;* Input          : none
;* Output         : none
;********************************************************************************/
DMAIRQHandler:
        IRQ_to_SYS
        BL     DMA_IRQHandler
        SYS_to_IRQ

/*;*******************************************************************************
;* Function Name  : EXTITIRQHandler
;* Description    : This function used to switch to SYS mode before entering
;*                  the EXTIT_IRQHandler function located in 75x_it.c.
;*                  Then to return to IRQ mode after the
;*                  EXTIT_IRQHandler function termination.
;* Input          : none
;* Output         : none
;********************************************************************************/
EXTITIRQHandler:
        IRQ_to_SYS
        BL     EXTIT_IRQHandler
        SYS_to_IRQ

/*;*******************************************************************************
;* Function Name  : MRCCIRQHandler
;* Description    : This function used to switch to SYS mode before entering
;*                  the MRCC_IRQHandler function located in 75x_it.c.
;*                  Then to return to IRQ mode after the
;*                  MRCC_IRQHandler function termination.
;* Input          : none
;* Output         : none
;********************************************************************************/
MRCCIRQHandler:
        IRQ_to_SYS
        BL     MRCC_IRQHandler
        SYS_to_IRQ

/*;*******************************************************************************
;* Function Name  : FLASHSMIIRQHandler
;* Description    : This function used to switch to SYS mode before entering
;*                  the FLASHSMI_IRQHandler function located in 75x_it.c.
;*                  Then to return to IRQ mode after the
;*                  FLASHSMI_IRQHandler function termination.
;* Input          : none
;* Output         : none
;********************************************************************************/
FLASHSMIIRQHandler:
        IRQ_to_SYS
        BL     FLASHSMI_IRQHandler
        SYS_to_IRQ

/*;*******************************************************************************
;* Function Name  : RTCIRQHandler
;* Description    : This function used to switch to SYS mode before entering
;*                  the RTC_IRQHandler function located in 75x_it.c.
;*                  Then to return to IRQ mode after the
;*                  RTC_IRQHandler function termination.
;* Input          : none
;* Output         : none
;********************************************************************************/
RTCIRQHandler:
        IRQ_to_SYS
        BL     RTC_IRQHandler
        SYS_to_IRQ

/*;*******************************************************************************
;* Function Name  : TBIRQHandler
;* Description    : This function used to switch to SYS mode before entering
;*                  the TB_IRQHandler function located in 75x_it.c.
;*                  Then to return to IRQ mode after the
;*                  TB_IRQHandler function termination.
;* Input          : none
;* Output         : none
;********************************************************************************/
TBIRQHandler:
        IRQ_to_SYS
        BL     TB_IRQHandler
        SYS_to_IRQ
/*;**********************************************************************************/

Reset_Handler:
        LDR     pc, =NextInst

NextInst:
/*; Reset all Peripheral Clocks*/
/*; This is usefull only when using debugger to Reset\Run the application*/

     .if SMI_Bank0_EN
        LDR     r0, =0x01000000          /*; Disable peripherals clock (except GPIO)*/
     .else
        LDR     r0, =0x00000000          /*; Disable peripherals clock*/
     .endif
        LDR     r1, =MRCC_PCLKEN_Addr
        STR     r0, [r1]

     .if SMI_Bank0_EN
        LDR     r0, =0x1875623F          /*; Peripherals kept under reset (except GPIO)*/
     .else
        LDR     r0, =0x1975623F          /*; Peripherals kept under reset*/
     .endif     
           
        STR     r0, [r1,#4]              
        MOV     r0, #0
        NOP                              /*; Wait*/
        NOP
        NOP
        NOP
        STR     r0, [r1,#4]              /*; Disable peripherals reset*/

/*; Initialize stack pointer registers
  ; Enter each mode in turn and set up the stack pointer*/



        MSR     CPSR_c, #Mode_FIQ|I_Bit|F_Bit /*; No interrupts*/
        ldr     sp, =FIQ_Stack

        MSR     CPSR_c, #Mode_IRQ|I_Bit|F_Bit /*; No interrupts*/
        ldr     sp, =IRQ_Stack

        MSR     CPSR_c, #Mode_ABT|I_Bit|F_Bit /*; No interrupts*/
        ldr     sp, =ABT_Stack

        MSR     CPSR_c, #Mode_UNDEF|I_Bit|F_Bit /*; No interrupts*/
        ldr     sp,  =UNDEF_Stack

        MSR     CPSR_c, #Mode_SVC|I_Bit|F_Bit /*; No interrupts*/
        ldr     sp, =_estack

/*; ------------------------------------------------------------------------------
; Description  :  Enable SMI Bank0: enable GPIOs clock in MRCC_PCLKEN register, 
;                 enable SMI alternate function in GPIO_REMAP register and enable 
;                 Bank0 in SMI_CR1 register.
; ------------------------------------------------------------------------------*/
  .if SMI_Bank0_EN
        MOV     r0, #0x01000000
        LDR     r1, =MRCC_PCLKEN_Addr
        STR     r0, [r1]                 /*; Enable GPIOs clock*/

        LDR     r1, =GPIOREMAP0R_Addr
        MOV     r0, #SMI_EN_Mask
        LDR     r2, [r1]
        ORR     r2, r2, r0
        STR     r2, [r1]                 /*; Enable SMI alternate function  */

        LDR     r0, =0x251               /*; SMI Bank0 enabled, Prescaler = 2, Deselect Time = 5*/
        LDR     r1, =SMI_CR1_Addr
        STR     r0, [r1]                 /*; Configure CR1 register */
        LDR     r0, =0x00
        STR     r0, [r1,#4]              /*; Reset CR2 register */
  .endif

/*; ----------------------------------------------------------------------------
; Description  :  Remapping SRAM at address 0x00 after the application has 
;                 started executing. 
; ----------------------------------------------------------------------------*/
 .if  Remap_SRAM
        MOV     r0, #SRAM_mask
        LDR     r1, =CFG_GLCONF_Addr
        LDR     r2, [r1]                  /*; Read GLCONF Register*/
        BIC     r2, r2, #0x03             /*; Reset the SW_BOOT bits*/
        ORR     r2, r2, r0                /*; Change the SW_BOOT bits*/
        STR     r2, [r1]                  /*; Write GLCONF Register*/
  .endif

/*;-------------------------------------------------------------------------------
;Description  : Initialize the EIC as following :
;              - IRQ disabled
;              - FIQ disabled
;              - IVR contains the load PC opcode
;              - All channels are disabled
;              - All channels priority equal to 0
;              - All SIR registers contains offset to the related IRQ table entry
;-------------------------------------------------------------------------------*/
  .if EIC_INIT
        LDR     r3, =EIC_base_addr
        LDR     r4, =0x00000000
        STR     r4, [r3, #ICR_off_addr]   /*; Disable FIQ and IRQ*/
        STR     r4, [r3, #IER_off_addr]   /*; Disable all interrupts channels*/

        LDR     r4, =0xFFFFFFFF
        STR     r4, [r3, #IPR_off_addr]   /*; Clear all IRQ pending bits*/

        LDR     r4, =0x18
        STR     r4, [r3, #FIR_off_addr]   /*; Disable FIQ channels and clear FIQ pending bits*/

        LDR     r4, =0x00000000
        STR     r4, [r3, #CIPR_off_addr]  /*; Reset the current priority register*/

        LDR     r4, =0xE59F0000           /*; Write the LDR pc,pc,#offset..*/
        STR     r4, [r3, #IVR_off_addr]   /*; ..instruction code in IVR[31:16]*/


        LDR     r2,= 32                   /*; 32 Channel to initialize*/
        LDR     r0, =WAKUP_Addr           /*; Read the address of the IRQs address table*/
        LDR     r1, =0x00000FFF
        AND     r0,r0,r1
        LDR     r5,=SIR0_off_addr         /*; Read SIR0 address*/
        SUB     r4,r0,#8                  /*; subtract 8 for prefetch*/
        LDR     r1, =0xF7E8               /*; add the offset to the 0x00 address..*/
                                          /*; ..(IVR address + 7E8 = 0x00)*/
                                          /*; 0xF7E8 used to complete the LDR pc,offset opcode*/
        ADD     r1,r4,r1                  /*; compute the jump offset*/
EIC_INI:
        MOV     r4, r1, LSL #16           /*; Left shift the result*/
        STR     r4, [r3, r5]              /*; Store the result in SIRx register*/
        ADD     r1, r1, #4                /*; Next IRQ address*/
        ADD     r5, r5, #4                /*; Next SIR*/
        SUBS    r2, r2, #1                /*; Decrement the number of SIR registers to initialize*/
        BNE     EIC_INI                   /*; If more then continue*/

 .endif





  /* ;copy the initial values for .data section from FLASH to RAM */
	ldr	R1, =_sidata
	ldr	R2, =_sdata
	ldr	R3, =_edata
_reset_inidata_loop:
	cmp	R2, R3
	ldrlO	R0, [R1], #4
	strlO	R0, [R2], #4
	blO	_reset_inidata_loop

	;/* Clear the .bss section */
	mov   r0,#0						;/* get a zero */
	ldr   r1,=_sbss				;/* point to bss start */
	ldr   r2,=_ebss				;/* point to bss end */
_reset_inibss_loop:
	cmp   r1,r2						;/* check if some data remains to clear */
	strlo r0,[r1],#4				;/* clear 4 bytes */
	blo   _reset_inibss_loop	;/* loop until done */

/************************************************************************************************/

/*; --- Now enter the C code */
        B       main   /*; Note : use B not BL, because an application will*/
                         /*; never return this way*/