📄 usart0_setup.c
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// |-----------------------------------------------------------------------|
// 31 24
//
// |-----------------------------------------------------------------------|
// | |
// |-----------------------------------------------------------------------|
// 23 16
//
// |-----------------------------------------------------------------------|
// | |
// |-----------------------------------------------------------------------|
// 15 8
//
// |-----------------------------------------------------------------------|
// | NB_ERRORS |
// |-----------------------------------------------------------------------|
// 7 0
// Read-only, nothing to set up here
// USART0 IrDA Filter Register US_IF (read/write)
// |-----------------------------------------------------------------------|
// | |
// |-----------------------------------------------------------------------|
// 31 24
//
// |-----------------------------------------------------------------------|
// | |
// |-----------------------------------------------------------------------|
// 23 16
//
// |-----------------------------------------------------------------------|
// | |
// |-----------------------------------------------------------------------|
// 15 8
//
// |-----------------------------------------------------------------------|
// | IRDA_FILTER |
// |-----------------------------------------------------------------------|
// 7 0
// not used, nothing to set up here
// ---------------------------------------------------
// The following are the DMA registers for the USART0
// ---------------------------------------------------
// USART0 PDC Receive Pointer Register US_RPR (read/write)
// |-----------------------------------------------------------------------|
// | RXPTR |
// |-----------------------------------------------------------------------|
// 31 0
//
pUsart0->US_RPR = (unsigned int)Buffer; // address of DMA input buffer
// USART0 PDC Receive Counter Register US_RCR (read/write)
// |-----------------------------------------------------------------------|
// | |
// |-----------------------------------------------------------------------|
// 31 16
//
// |-----------------------------------------------------------------------|
// | RXCTR |
// |-----------------------------------------------------------------------|
// 15 0
//
pUsart0->US_RCR = 10; // we'll read in 10 chars via DMA
// USART0 PDC Transmit Pointer Register US_TPR (read/write)
// |-----------------------------------------------------------------------|
// | TXPTR |
// |-----------------------------------------------------------------------|
// 31 0
//
pUsart0->US_TPR = (unsigned int)Buffer; // address of DMA output buffer (use same one)
// USART0 PDC Transmit Counter Register US_TCR (read/write)
// |-----------------------------------------------------------------------|
// | |
// |-----------------------------------------------------------------------|
// 31 16
//
// |-----------------------------------------------------------------------|
// | TXCTR |
// |-----------------------------------------------------------------------|
// 15 0
//
pUsart0->US_TCR = 10; // we'll transmit 10 chars via DMA
// USART0 PDC Receive Next Pointer Register US_RNPR (read/write)
// |-----------------------------------------------------------------------|
// | RXNPTR |
// |-----------------------------------------------------------------------|
// 31 0
//
pUsart0->US_RNPR = (unsigned int)0; // next DMA receive buffer address
// if set to zero, it is not used
// USART0 PDC Receive NextCounter Register US_RNCR (read/write)
// |-----------------------------------------------------------------------|
// | |
// |-----------------------------------------------------------------------|
// 31 16
//
// |-----------------------------------------------------------------------|
// | RXNCR |
// |-----------------------------------------------------------------------|
// 15 0
//
pUsart0->US_RNCR = (unsigned int)0; // next DMA receive counter
// if set to zero, it is not used
// USART0 PDC Transmit Next Pointer Register US_TNPR (read/write)
// |-----------------------------------------------------------------------|
// | TXNPTR |
// |-----------------------------------------------------------------------|
// 31 0
//
pUsart0->US_TNPR = (unsigned int)0; // next DMA transmit buffer address
// if set to zero, it is not used
// USART0 PDC Transmit NextCounter Register US_TNCR (read/write)
// |-----------------------------------------------------------------------|
// | |
// |-----------------------------------------------------------------------|
// 31 16
//
// |-----------------------------------------------------------------------|
// | TXNCR |
// |-----------------------------------------------------------------------|
// 15 0
//
pUsart0->US_TNCR = (unsigned int)0; // next DMA transmit counter
// if set to zero, it is not used
// USART0 PDC Transfer Control Register US_PTCR (write-only)
// |-----------------------------------------------------------------------|
// | |
// |-----------------------------------------------------------------------|
// 31 16
//
// |--------|--------|--------|--------|--------|--------|--------|--------|
// | TXTDIS TXTEN |
// |--------|--------|--------|--------|--------|--------|--------|--------|
// 15 14 13 12 11 10 9 8
//
// |--------|--------|--------|--------|--------|--------|--------|--------|
// | RXTDIS RXTEN |
// |--------|--------|--------|--------|--------|--------|--------|--------|
// 7 6 5 4 3 2 1 0
//
// RXTEN = 1 // receiver transfer enable (enabled)
// RXTDIS = 0 // receiver transfer disable (no effect)
// TXTEN = 0 // transmitter transfer enable (no effectd)
// TXTDIS = 1 // transmitter transfer disable (disabled)
//
pUsart0->US_PTCR = AT91C_PDC_RXTEN | // enable receive transfer,
AT91C_PDC_TXTDIS; // disable transmit transfer
// Set up the Advanced Interrupt Controller (AIC) registers for USART0
volatile AT91PS_AIC pAIC = AT91C_BASE_AIC; // pointer to AIC data structure
pAIC->AIC_IDCR = (1<<AT91C_ID_US0); // Disable USART0 interrupt in AIC Interrupt Disable Command Register
pAIC->AIC_SVR[AT91C_ID_US0] = // Set the USART0 IRQ handler address in AIC Source
(unsigned int)Usart0IrqHandler; // Vector Register[6]
pAIC->AIC_SMR[AT91C_ID_US0] = // Set the interrupt source type and priority
(AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL | 0x4 ); // in AIC Source Mode Register[6]
pAIC->AIC_IECR = (1<<AT91C_ID_US0); // Enable the USART0 interrupt in AIC Interrupt Enable Command Register
// enable the USART0 receiver and transmitter
pUsart0->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
// enable the USART0 end-of-receive interrupt
pUsart0->US_IER = AT91C_US_ENDRX; // enable ENDRX usart0 end-of-receive interrupt
pUsart0->US_IDR = ~AT91C_US_ENDRX; // disable all interrupts except ENDRX
// at this point, only the USART0 end-of-receive interrupt is armed!
// note: this means that incoming characters will not cause an interrupt until the 10th
// character is received.
}
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