usart0_isr.c

UART developing tutorial module with source codes a褌胁 hints.

//  *****************************************************************************
//   						usart0_isr.c
// 
//     USART0 Interrupt Service Routine - DMA version
//
//	   This demonstration is designed to read 10 characters into a buffer.
//     After the 10th character arrives, transmit the 10 characters back.
//
//	   The application is interrupt-driven but uses the DMA.
//
//  Author:  James P Lynch  June 22, 2008
//  ***************************************************************************** 

//  *******************************************************
//                Header Files
//  *******************************************************
#include "at91sam7x256.h"
#include "board.h"

//  *******************************************************
//                Global Variables
//  *******************************************************
char			Buffer[32];				// holds received characters
unsigned long	nChars = 0;				// counts number of received chars
char			*pBuffer = &Buffer[0];	// pointer into Buffer


void Usart0IrqHandler (void) {
         
	volatile AT91PS_USART pUsart0 = AT91C_BASE_US0;		// create a pointer to USART0 structure
	
	// determine which interrupt has occurred (end-of-receive DMA or end-of-transmit DMA)
	if ((pUsart0->US_CSR & AT91C_US_ENDRX) == AT91C_US_ENDRX) {

		// we have a end-of-receive interrupt (ENDRX)
		pUsart0->US_RCR = 10;							// restore the receive count - clears ENDRX flag
		
		// point the transmit buffer pointer to beginning of buffer, set count to 10
		pUsart0->US_TPR = (AT91_REG)&Buffer[0];			// address of DMA output buffer (use same one)
		pUsart0->US_TCR = 10;							// we'll transmit 10 chars via DMA
		
		// disable the end-of-receive interrupt, enable the end-of-transmit interrupt
		pUsart0->US_IER = AT91C_US_ENDTX;				// enable usart0 end-of-transmit interrupt
		pUsart0->US_IDR = ~AT91C_US_ENDTX;				// disable all interrupts except ENDTX
			
		// enable transmit DMA transfers, disable receive DMA transfers
		// note: this will START the transmission of whatever is in the Buffer[32]!
		pUsart0->US_PTCR =	AT91C_PDC_TXTEN | 			// enable transmit transfer,
							AT91C_PDC_RXTDIS;			// disable receive transfer
		
	} else if ((pUsart0->US_CSR & AT91C_US_ENDTX) == AT91C_US_ENDTX) {
		
		// we have a end-of-transmit interrupt (10 characters have clocked out)
		pUsart0->US_TCR = 10;							// restore the transmit count - clears ENDTX flag
		
		// point the receive buffer pointer to beginning of buffer, set count to 10
		pUsart0->US_RPR = (AT91_REG)&Buffer[0];			// address of DMA output buffer (use same one)
		pUsart0->US_RCR = 10;							// we'll receive 10 chars via DMA
			
		// enable receive interrupt, disable the transmit interrupt
		pUsart0->US_IER = AT91C_US_ENDRX;				// enable usart0 end-of-receive interrupt
		pUsart0->US_IDR = ~AT91C_US_ENDRX;				// disable all interrupts except ENDRX
		
		// enable receive DMA transfers, disable transmit DMA transfers
		// note: the DMA transfer will start when the first character arrives! 
		pUsart0->US_PTCR =	AT91C_PDC_RXTEN | 			// enable receive transfer,
							AT91C_PDC_TXTDIS;			// disable transmit transfer
	}
}