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📄 ffsport_spi.c

📁 The Fat Fs module is a middleware that written in ANSI C. There is no platform dependence, so long a
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/***********************************************************
*           MMC/SD-interface to SPI-slot of LPC214x        *
*                                                          *
*          by  Frank Goetze  -  www.embedded-os.de         *
************************************************************
*                      FFSPort_MMC.c                       *
*                   MMC/SD TO SPI PORT                     *
************************************************************
*      - code generation            Frank Goetze   09/2007 *
***********************************************************/

#include "../../../inc/MMC/LPC214x/FFSPort_SPI.h"

/****************** constant variables ********************/
#define CPU_CRISTAL_CLK  12000000UL                        // processor crystal-clock in Hz

/*
************************************************************
*          set max possible baudrate and return this
************************************************************
*/
U32 FFSPort_MMC_SetBR(U32 maxclk)
{
    U32 s_clksrc;
    U08 d;

    s_clksrc  = CPU_CRISTAL_CLK;                                       // set start-clk (cristal-clk)
    if((LPC_PLLSTAT & (LPC_PLL_PLLC | LPC_PLL_PLLE)) == (LPC_PLL_PLLC | LPC_PLL_PLLE)) {  // if PLL really (PLLc & PLLe) enabled
        while(!(LPC_PLLSTAT & LPC_PLL_PLOCK));                         // be shure PLL is locked
        s_clksrc *= ((LPC_PLLSTAT & LPC_PLL_MSEL)+1);                  // mul clk with PLL-multiplier (defined at startup)
    }
    s_clksrc /= ((LPC_VPB_DIV & 3) == 0)? 4: (LPC_VPB_DIV & 3);        // div clk with VBP-dividier   (defined at startup)
    d = 1;
    while((maxclk < (s_clksrc / (2 * d))) && (d < 0x7F)) d++;          // search lowest clk-div for SPI-speed (highest possible SPI-speed)
    LPC_SSP_CPSR = 2 * d;                                              // set SSP-div and return the used SPI-speed in Hz
    return(s_clksrc / (2 * d));                                        // !!! since SSP_CPSR can only be an even-value ...
}                                                                      // ... you get not really alltimes the highest possible speed !!!

/*
************************************************************
*            write a char and read one back
************************************************************
*/
U08 FFSPort_MMC_Send(U08 w)
{
    while(!(LPC_SSP_SR & 0x00000001U));                    // wait up to tx-empty
    LPC_SSP_DR = w;                                        // write char and send
    while(!(LPC_SSP_SR & 0x00000004U));                    // wait up to rx-not_empty (char received)
    return((U08)LPC_SSP_DR);                               // return received char
}


/*
************************************************************
*              reinitialise the SPI-port
************************************************************
*/
U08 FFSPort_MMC_ReInit(void)
{
    LPC_SSP_CPSR   = 0x000000FEU;                          // prescaler use at startup PCLK / 254
    LPC_SSP_CR0    = 0x000001C7U;                          // div result of prescaler by (1+1) & CPHA=1 & CPOL=1 & SPI-format & 8-bit
    LPC_SSP_CR1    = 0x00000002U;                          // SSP as SPI - enable as master
    FFSPort_MMC_SetBR(400000);                             // set SPI-clk to max 400kHz as startup (should never be > 400kHz, says MMC)
    return(0);                                             // return actual alltimes ok.
}

/*
************************************************************
*              initialise the SPI-port
************************************************************
*/
U08 FFSPort_MMC_Init(void)
{
    LPC_PCONP     |= 0x00000400U;                          // power/clock SSP/SPI1
    LPC_PINSEL2   &=~0x00000008U;                          // P1.24 & P1.25 as WP & CD (GPIO) - for P1.25-16
    LPC_GPIO_0DIR &=~0x03000000U;                          // P1.24 & P1.25 as input
    LPC_PINSEL1    = (LPC_PINSEL1 & 0xFFFFFCABU) | 0x000000A8U;   // P0.17-as-SCK1 & P0.18-as-MISO1 & P0.19-as-MOSI1 & P0.20-as-GPIO
    LPC_GPIO_0DIR |= 0x00100000U;                          // P0.20(manual SSEL1) as output
    return(FFSPort_MMC_ReInit());
}

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