pciiomapshow.c

workbench下vxworks6.6的ARM920T核对应的BSP源码

/* pciIomapShow.c - Show routines of PCI bus(IO mapped) library */

/*
 * Copyright (c) 2000, 2004, 2005, 2007 Wind River Systems, Inc.
 *
 * The right to copy, distribute or otherwise make use of this software
 * may be licensed only pursuant to the terms of an applicable Wind River
 * license agreement.
 */

/*
modification history
--------------------
01e,26sep07,mdo  Clear out apigen errors/warnings
01d,27sep05,h_k  cleaned up Diab compiler warning. (SPR #112110)
01c,20dec04,rec  correct more compiler warnings
01b,16aug04,scm  correct diab warnings...
01a,13jan00,pr   Adapted from cma220.
*/


/*
DESCRIPTION

This module contains show routine to see all devices and bridges on the PCI bus.
This module works in conjunction with pciIomapLib.o.
There are two ways to find out an empty device.
  - check Master Abort bit after the access.
  - check whether the read value is 0xffff.
It uses the second method, since I didn't see the Master Abort bit of
the host/PCI bridge changing.

INCLUDE FILES: pciIomapLib.h
*/

#if (defined(INCLUDE_PCI) && defined(INCLUDE_SHOW_ROUTINES))

#include <vxWorks.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <dllLib.h>
/*
 * We currently wish to include this from locally rather than from there as that
 * version is out-dated. However, as it has been included in sysLib.c already,
 * this will do no harm.
 */
#include "pciIomapLib.h"


/* defines */


/* externs */

IMPORT int pciLibInitStatus;
IMPORT int pciConfigMech;


/* globals */


/* locals */


/* forward declarations */

LOCAL void pciDheaderPrint	(PCI_HEADER_DEVICE * pD);
LOCAL void pciBheaderPrint	(PCI_HEADER_BRIDGE * pB);


/*******************************************************************************
*
* pciIomapShowInit - initialize the show routines.
*
* This routine is used to pull in all routines in this library.
*
* RETURNS: N/A
*
* \NOMANUAL
*/

void pciIomapShowInit (void)
    {
    }

/*******************************************************************************
*
* pciDeviceShow - print information about PCI devices
*
* This routine prints information about PCI devices
* There are two ways to find out an empty device.
*   - check Master Abort bit after the access.
*   - check whether the read value is 0xffff.
* It uses the second method, since I didn't see the Master Abort bit of
* the host/PCI bridge changing.
*
* RETURNS:
* OK, or ERROR if the library is not initialized.
*/

STATUS pciDeviceShow
    (
    int	busNo		/* bus number */
    )
    {
    int deviceNo;
    int devices;
    ushort_t vendorId;
    ushort_t deviceId;
    union
	{
	int classCode;
	char array[4];
	} u;

    if (pciLibInitStatus != OK)			/* sanity check */
        return (ERROR);

    printf ("Scanning function 0 of each PCI device on bus %d\n", busNo);
    printf ("Using configuration mechanism %d\n", pciConfigMech);
    printf ("bus       device    function  vendorID  deviceID  class\n");

    if (pciConfigMech == PCI_MECHANISM_1)
	devices = 0x1f;
    else
	devices = 0x0f;

    if (busNo != 0)
	{
	if (devices > 0x0f)
	    devices = 0x0f;
	}

    if (devices > PCI_MAX_DEV)
	devices = PCI_MAX_DEV;

    for (deviceNo=0; deviceNo < devices; deviceNo++)
	{
	pciConfigInWord (busNo, deviceNo, 0, PCI_CFG_VENDOR_ID, (short *) &vendorId);
	pciConfigInWord (busNo, deviceNo, 0, PCI_CFG_DEVICE_ID, (short *) &deviceId);
#if (_BYTE_ORDER == _BIG_ENDIAN)
	pciConfigInByte (busNo, deviceNo, 0, PCI_CFG_PROGRAMMING_IF,
			 &u.array[3]);
	pciConfigInByte (busNo, deviceNo, 0, PCI_CFG_SUBCLASS, &u.array[2]);
	pciConfigInByte (busNo, deviceNo, 0, PCI_CFG_CLASS, &u.array[1]);
	u.array[0] = 0;
#else
	pciConfigInByte (busNo, deviceNo, 0, PCI_CFG_PROGRAMMING_IF,
			 &u.array[0]);
	pciConfigInByte (busNo, deviceNo, 0, PCI_CFG_SUBCLASS, &u.array[1]);
	pciConfigInByte (busNo, deviceNo, 0, PCI_CFG_CLASS, &u.array[2]);
	u.array[3] = 0;
#endif
	/*
	 * There are two ways to find out an empty device.
	 *   1. check Master Abort bit after the access.
	 *   2. check whether the read value is 0xffff.
	 * Since I didn't see the Master Abort bit of the host/PCI bridge
	 * changing, I use the second method.
	 */

	if (vendorId != 0xffff)
	    printf ("%.8x  %.8x  %.8x  %.8x  %.8x  %.8x\n",
		    busNo, deviceNo, 0, vendorId, deviceId, u.classCode);
	}

    return (OK);
    }

/*******************************************************************************
*
* pciHeaderShow - print a header of the specified PCI device
*
* This routine prints a header of the PCI device specified by busNo, deviceNo,
* and funcNo.
*
* RETURNS:
* OK, or ERROR if this library is not initialized.
*/

STATUS pciHeaderShow
    (
    int	busNo,		/* bus number */
    int	deviceNo,	/* device number */
    int	funcNo		/* function number */
    )
    {
    PCI_HEADER_DEVICE headerDevice;
    PCI_HEADER_BRIDGE headerBridge;
    PCI_HEADER_DEVICE * pD = &headerDevice;
    PCI_HEADER_BRIDGE * pB = &headerBridge;

    if (pciLibInitStatus != OK)			/* sanity check */
        return (ERROR);

    pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_HEADER_TYPE,
		     &pD->headerType);

    if (pD->headerType & 0x01)		/* PCI-to-PCI bridge */
	{
        pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_VENDOR_ID,
			 &pB->vendorId);
        pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_DEVICE_ID,
			 &pB->deviceId);
        pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_COMMAND,
			 &pB->command);
        pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_STATUS,
			 &pB->status);
        pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_REVISION,
			 &pB->revisionId);
        pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_PROGRAMMING_IF,
			 &pB->progIf);
        pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_SUBCLASS,
			 &pB->subClass);
        pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_CLASS,
			 &pB->classCode);
        pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_CACHE_LINE_SIZE,
			 &pB->cacheLine);
        pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_LATENCY_TIMER,
			 &pB->latency);
        pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_HEADER_TYPE,
			 &pB->headerType);
        pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_BIST,
			 &pB->bist);
        pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_BASE_ADDRESS_0,
			 &pB->base0);
        pciConfigInLong (busNo, deviceNo, funcNo, PCI_CFG_BASE_ADDRESS_1,
			 &pB->base1);
        pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_PRIMARY_BUS,
			 &pB->priBus);
        pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_SECONDARY_BUS,
			 &pB->secBus);
        pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_SUBORDINATE_BUS,
			 &pB->subBus);
        pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_SEC_LATENCY,
			 &pB->secLatency);
        pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_IO_BASE,
			 &pB->ioBase);
        pciConfigInByte (busNo, deviceNo, funcNo, PCI_CFG_IO_LIMIT,
			 &pB->ioLimit);
        pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_SEC_STATUS,
			 &pB->secStatus);
        pciConfigInWord (busNo, deviceNo, funcNo, PCI_CFG_MEM_BASE,
			 &pB->memBase);