📄 hardware.lst
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/////////////////////////////////////////////////////////////////
// Note: This register map to the P_INT_Ctrl(0x7010)
// User's interrupt setting have to combine with this register
// while co-work with SACM library.
//
// See. following function for example:
// F_SP_SACM_A2000_Init_:
// F_SP_SACM_S480_Init_:
// F_SP_SACM_S240_Init_:
// F_SP_SACM_MS01_Init_:
// F_SP_SACM_DVR_Init_:
//////////////////////////////////////////////////
00000001 .IRAM
00000001 00 00 .VAR R_InterruptStatus = 0 //
//////////////////////////////////////////////////
.define C_RampDelayTime 16
.define C_QueueSize 100
00000002 00 00 .VAR R_Queue
00000003 00 00 00 00 .DW C_QueueSize-1 DUP(0)
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00 00 00
00 00
00000066 00 00 .VAR R_ReadIndex
00000067 00 00 .VAR R_WriteIndex
00008631 .CODE
///////////////////////////////////////////
// Function: Initial Queue
// Destory: R1,R2
///////////////////////////////////////////
_SP_InitQueue: .PROC
_SP_InitQueue_A2000:
_SP_InitQueue_S480:
_SP_InitQueue_S240:
_SP_InitQueue_MS01:
_SP_InitQueue_DVR:
F_SP_InitQueue_A2000:
F_SP_InitQueue_S480:
F_SP_InitQueue_S240:
F_SP_InitQueue_MS01:
F_SP_InitQueue_DVR:
F_SP_InitQueue:
00008631 09 93 02 00 R1 = R_Queue
00008633 40 94 R2 = 0
L_ClearQueueLoop?:
00008634 D1 D4 [R1++] = R2
00008635 09 43 66 00 cmp R1, R_Queue+C_QueueSize
00008637 44 4E jne L_ClearQueueLoop?
00008638 40 92 R1 = 0
00008639 19 D3 66 00 [R_ReadIndex] = R1
0000863B 19 D3 67 00 [R_WriteIndex] = R1
0000863D 90 9A RETF
.ENDP
///////////////////////////////////////////
// Function: Get a data form Queue
// Output: R1: Data
// R2: return value
// Destory: R1,R2
///////////////////////////////////////////
F_SP_ReadQueue_A2000:
F_SP_ReadQueue_S480:
F_SP_ReadQueue_S240:
F_SP_ReadQueue_MS01:
F_SP_ReadQueue_DVR:
F_SP_ReadQueue:
0000863E 12 95 66 00 R2 = [R_ReadIndex]
00008640 12 45 67 00 cmp R2,[R_WriteIndex]
00008642 0D 5E je L_RQ_QueueEmpty
00008643 0A 05 02 00 R2 += R_Queue // get queue data address
00008645 C2 92 R1 = [R2]
00008646 12 95 66 00 R2 = [R_ReadIndex]
00008648 41 04 R2 += 1
00008649 0A 45 64 00 cmp R2, C_QueueSize
0000864B 01 4E jne L_RQ_NotQueueBottom
0000864C 40 94 R2 = 0
L_RQ_NotQueueBottom:
0000864D 1A D5 66 00 [R_ReadIndex] = R2
//r2 = 0x0000 // get queue data
0000864F 90 9A retf
L_RQ_QueueEmpty:
//r2 = 0x8000 // queue empty
00008650 90 9A retf
///////////////////////////////////////////
// Function: Get a data from Queue but do
// not change queue index
// R1: output
// Destory: R1,R2
///////////////////////////////////////////
F_SP_ReadQueue_NIC:
F_SP_ReadQueue_NIC_A2000:
F_SP_ReadQueue_NIC_S480:
F_SP_ReadQueue_NIC_S240:
F_SP_ReadQueue_NIC_MS01:
F_SP_ReadQueue_NIC_DVR:
00008651 12 95 66 00 R2 = [R_ReadIndex]
00008653 12 45 67 00 cmp R2,[R_WriteIndex]
00008655 03 5E je L_RQ_QueueEmpty?
00008656 0A 05 02 00 R2 += R_Queue // get queue data index
00008658 C2 92 R1 = [R2]
L_RQ_QueueEmpty?:
00008659 90 9A RETF
///////////////////////////////////////////
// Function: Put a data to Queue
// R1: Input
// Destory: R1,R2
///////////////////////////////////////////
F_SP_WriteQueue_A2000:
F_SP_WriteQueue_S480:
F_SP_WriteQueue_S240:
F_SP_WriteQueue_MS01:
F_SP_WriteQueue_DVR:
F_SP_WriteQueue:
0000865A 12 95 67 00 R2 = [R_WriteIndex] // put data to queue
0000865C 0A 05 02 00 R2 += R_Queue
0000865E C2 D2 [R2] = R1
0000865F 12 95 67 00 R2 = [R_WriteIndex]
00008661 41 04 R2 += 1
00008662 0A 45 64 00 cmp R2, C_QueueSize
00008664 01 4E jne L_WQ_NotQueueBottom
00008665 40 94 R2 = 0
L_WQ_NotQueueBottom:
00008666 1A D5 67 00 [R_WriteIndex] = R2
00008668 90 9A RETF
///////////////////////////////////////////
// Function: Test Queue Status
// o/p: R1
// Destory: R1
///////////////////////////////////////////
F_SP_TestQueue_A2000:
F_SP_TestQueue_S480:
F_SP_TestQueue_S240:
F_SP_TestQueue_MS01:
F_SP_TestQueue_DVR:
F_SP_TestQueue:
//... Test Queue Empty ...
00008669 11 93 66 00 R1 = [R_ReadIndex]
0000866B 11 43 67 00 cmp R1,[R_WriteIndex]
0000866D 12 5E je L_TQ_QueueEmpty
//... Test Queue Full ...
0000866E 11 93 66 00 R1 = [R_ReadIndex] // For N Queue Full: 1.R=0 and W=N-1 2. R<>0 and W=R-1
00008670 05 4E jnz L_TQ_JudgeCond2
00008671 11 93 67 00 R1 = [R_WriteIndex]
00008673 09 43 63 00 cmp R1, C_QueueSize-1 // Cond1
00008675 08 5E je L_TQ_QueueFull
L_TQ_JudgeCond2:
00008676 11 93 66 00 R1 = [R_ReadIndex]
00008678 41 22 R1 -=1
00008679 11 43 67 00 cmp R1,[R_WriteIndex]
0000867B 02 5E je L_TQ_QueueFull
0000867C 40 92 r1 = 0 // not Full, not empty
0000867D 90 9A retf
L_TQ_QueueFull:
0000867E 41 92 r1 = 1 // full
0000867F 90 9A retf
L_TQ_QueueEmpty:
00008680 42 92 r1 = 2 // empty
00008681 90 9A retf
///////////////////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_A2000_Initial()
// or F_SACM_A2000_Initial:
// Note: The following functions are the partial code of original
// initial subroutine. (H/W setting part)
//
// Ex: F_SACM_A2000_Initial:
// ...
// call F_SP_SACM_A2000_Init_ : S480/S240/MS01 is same
// ...
// retf
////////////////////////////////////////////////////////////////////////////////
F_SP_SACM_A2000_Init_:
00008682 40 92 R1=0x0000; // 24MHz, Fcpu=Fosc
00008683 19 D3 13 70 [P_SystemClock]=R1 // Frequency 20MHz
00008685 70 92 R1 = 0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
00008686 19 D3 0B 70 [P_TimerA_Ctrl] = R1 // Initial Timer A
00008688 09 93 00 FD R1 = 0xfd00 // 16K
0000868A 19 D3 0A 70 [P_TimerA_Data] = R1
0000868C 09 93 A8 00 R1 = 0x00A8 // Set the DAC Ctrl
0000868E 19 D3 2A 70 [P_DAC_Ctrl] = R1
00008690 09 93 FF FF R1 = 0xffff
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