📄 ce100_readme.txt
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Readme File for Code Example:
CE100 - ADC Sampling and IIR Filtering
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This file contains the following sections:
1. Code Example Description
2. Folder Contents
3. Suggested Development Resources
4. Reconfiguring the project for a different dsPIC33F device
5. Revision History
1. Code Example Description:
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In this example, ADC is configured to sample (AIN5) at 8Khz rate and coverted data is assembled as 256 sample buffer before triggering filtering operation.
Timer 3 is setup to time-out every 125 microseconds (8Khz Rate).
As a result, the module will stop sampling and trigger a 12-bit A/D conversion on every Timer3 time-out, i.e., Ts=125us.
At that time, the conversion process starts and completes Tc=14*Tad periods later.
When the conversion completes, the module starts sampling again. However, since Timer3
is already on and counting, about (Ts-Tc)us later, Timer3 will expire again and trigger
next conversion.
ADC module clock time period is configured as Tad=Tcy*(ADCS+1)= (1/40M)*64 = 1.6us (625Khz).
Hence the conversion time for 12-bit A/D Conversion Time Tc=14*Tad = 22.4us
void initTmr3();
Timer 3 is configured to time-out at 8Khz rate.
void initAdc1(void);
ADC module is set-up to convert AIN5 input using CH0 S/H on Timer 3 event in 12-bit mode.
void initDma0(void);
DMA channel 0 is confiured in ping-pong mode to move the converted data from ADC to DMA RAM on every sample/convert sequence.
It generates interrupt after every 256 sample transfer.
void __attribute__((__interrupt__)) _DMA0Interrupt(void);
DMA interrupt service routine performs IIR filtering on the data buffer.
2. Folder Contents:
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This folder contains the following sub-folders:
a. C:\Program Files\Microchip\MPLAB C30\support\gld
This folder will have the device GLD file, it is used for building the project.
This file was provided with the MPLAB
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