📄 spmc65.inc
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C_T18B_CAP: EQU %00110000 ; Timer1 Function as 8 Bit Capture
C_T18B_COMP: EQU %00100000 ; Timer1 Function as 8 Bit Compare
C_T18B_Timer: EQU %00010000 ; Timer1 Function as 8 Bit Timer
;
P_TMR0_1_Ctrl1: EQU $12 ; Timer0/1 control 1.
C_T1EXT_EN: EQU %01110000 ; External Event
C_T1FCS_Div_512: EQU %01100000 ; Timer1 Clock= FCS / 512
C_T1FCS_Div_128: EQU %01010000 ; Timer1 Clock= FCS / 128
C_T1FCS_Div_32: EQU %01000000 ; Timer1 Clock= FCS / 32
C_T1FCS_Div_8: EQU %00110000 ; Timer1 Clock= FCS / 8
C_T1FCS_Div_4: EQU %00100000 ; Timer1 Clock= FCS / 4
C_T1FCS_Div_2: EQU %00010000 ; Timer1 Clock= FCS / 2
C_T1FCS_Div_1: EQU %00000000 ; Timer1 Clock= FCS / 1
;
P_TMR1_Data0: EQU $15 ; Timer1 8-bit Counter register.(R)
P_TMR1_PreloadLo: EQU $15 ; Timer1 8-bit preload register.(W)
P_TMR1_CompLo: EQU $15 ; Timer1 compare low byte value.
P_TMR1_CapLo: EQU $15 ; Timer1 capture low byte width value.
P_TMR1_PWM0: EQU $15 ; Timer1 PWM peroid low byte register.
;
P_TMR1_Data1: EQU $16 ; Timer1 16-bit Counter register.(R)
P_TMR1_PreloadHi: EQU $16 ; Timer1 16-bit preload register.(W)
P_TMR1_CompHi: EQU $16 ; Timer1 compare high byte value.
P_TMR1_CapHi: EQU $16 ; Timer1 capture high byte width value.
P_TMR1_PWM1: EQU $16 ; Timer1 PWM high byte register.
C_TMR1_PWMDuty: EQU %11110000 ; Timer1 PWM duty value.
C_TMR1_PWMPeriod: EQU %00001111 ; Timer1 PWM peroid value.
;
P_TMR1_PWM2: EQU $17 ; Timer1 PWM duty low byte register.
;
;-----------------------------------------------------------------------------------------------------
P_AD_Ctrl0: EQU $28 ; A/D converter control 0.
C_AD_EN: EQU %10000000 ; ADC enable control.(A)
C_AD_VRT: EQU %01000000 ; ADC bottom voltage source select bit.(A)
C_AD_CS_2: EQU %00000000 ; 000=Fcpu/2.
C_AD_CS_4: EQU %00000010 ; 001=Fcpu/4.
C_AD_CS_8: EQU %00000100 ; 010=Fcpu/8.
C_AD_CS_16: EQU %00000110 ; 011=Fcpu/16.
C_AD_CS_32: EQU %00001000 ; 100=Fcpu/32.
C_AD_CS_64: EQU %00001010 ; 101=Fcpu/64.
C_AD_CS_128: EQU %00001100 ; 110=Fcpu/128.
C_AD_CS_256: EQU %00001110 ; 111=Fcpu/256.
C_AD_RDY: EQU %00000001 ; ADC status bit.(R)
C_AD_Start: EQU %00000000 ; ADC conversion start bit.(W)
;
P_AD_Ctrl1: EQU $29 ; A/D converter control 1.
C_AD_Pin4: EQU %00010000 ; Analog input : channel 4.
C_AD_Pin5: EQU %00100000 ; Analog input : channel 5.
C_AD_Pin6: EQU %01000000 ; Analog input : channel 6.
C_AD_Pin7: EQU %10000000 ; Analog input : channel 7.
;
P_AD_Ctrl2: EQU $2A ; A/D converter control 2.
C_AD_CE: EQU %10000000 ; ADC power control bit.(A)
C_AD_Ch4: EQU %00100000 ; 0100:channel 4.
C_AD_Ch5: EQU %00101000 ; 0101:channel 5.
C_AD_Ch6: EQU %00110000 ; 0110:channel 6.
C_AD_Ch7: EQU %00111000 ; 0111:channel 7.
;
P_AD_DataLo: EQU $2B ; Converted A/D data[1:0] low.(R)
P_AD_DataHi: EQU $2C ; Converted A/D data[9:2] hi.(R)
;
;-----------------------------------------------------------------------------------------------------
P_BUZ_Ctrl: EQU $2D ; Buzzer & Timer base Control.
; Interval Timer Period selecttion bits.
C_TBASE_Dis: EQU %00000000 ; Time Base disable
C_TBASE_Div_128: EQU %00010000 ; Time Base Clk: Fto/2^7.
C_TBASE_Div_256: EQU %00100000 ; Time Base Clk: Fto/2^8.
C_TBASE_Div_512: EQU %00110000 ; Time Base Clk: Fto/2^9.
C_TBASE_Div_1k: EQU %01000000 ; Time Base Clk: Fto/2^10.
C_TBASE_Div_2k: EQU %01010000 ; Time Base Clk: Fto/2^11.
C_TBASE_Div_4k: EQU %01100000 ; Time Base Clk: Fto/2^12.
C_TBASE_Div_8k: EQU %01110000 ; Time Base Clk: Fto/2^13.
C_TBASE_Div_16k: EQU %10000000 ; Time Base Clk: Fto/2^14.
C_TBASE_Div_32k: EQU %10010000 ; Time Base Clk: Fto/2^15.
C_TBASE_Div_64k: EQU %10100000 ; Time Base Clk: Fto/2^16.
C_TBASE_Div_128k: EQU %10110000 ; Time Base Clk: Fto/2^17.
C_TBASE_Div_256k: EQU %11000000 ; Time Base Clk: Fto/2^18.
C_TBASE_Div_512k: EQU %11010000 ; Time Base Clk: Fto/2^19.
C_TBASE_Div_2M: EQU %11100000 ; Time Base Clk: Fto/2^21.
C_TBASE_Div_8M: EQU %11110000 ; Time Base Clk: Fto/2^23.
; Buzzer frequency selecttion bits.
C_BUZ_Dis: EQU %00000000 ; Buzzer disable
C_BUZ_Div_64: EQU %00000001 ; Buzzer:Fto/2^6.
C_BUZ_Div_128: EQU %00000010 ; Buzzer:Fto/2^7.
C_BUZ_Div_256: EQU %00000011 ; Buzzer:Fto/2^8.
C_BUZ_Div_512: EQU %00000100 ; Buzzer:Fto/2^9.
C_BUZ_Div_1k: EQU %00000101 ; Buzzer:Fto/2^10.
C_BUZ_Div_2k: EQU %00000110 ; Buzzer:Fto/2^11.
C_BUZ_Div_4k: EQU %00000111 ; Buzzer:Fto/2^12.
C_BUZ_Div_8k: EQU %00001000 ; Buzzer:Fto/2^13.
C_BUZ_Div_4: EQU %00001001 ; Buzzer:Fto/2^2.
C_BUZ_Div_8: EQU %00001010 ; Buzzer:Fto/2^3.
C_BUZ_Div_16: EQU %00001011 ; Buzzer:Fto/2^4.
C_BUZ_Div_32: EQU %00001100 ; Buzzer:Fto/2^5.
;
;-----------------------------------------------------------------------------------------------------
; Index Access Register
P_SYS_Ctrl: EQU $30 ; System control.
C_SCR_POR: EQU %10000000 ; Power On Reset Flag.(A)
C_SCR_ERST: EQU %01000000 ; External Reset Flag.(A)
C_SCR_LVR1: EQU %00100000 ; Low Voltage Reset Flag1.(A)
C_SCR_LVR0: EQU %00010000 ; Low Voltage Reset Flag0.(A)
C_SCR_WDTR: EQU %00001000 ; WDT Reset Flag.(A)
C_SCR_IAR: EQU %00000100 ; Illegal Address Reset Flag.(A)
C_SCR_IIR: EQU %00000001 ; Illegal instruction reset.(A)
;
P_MODE_Ctrl: EQU $31 ; Operation mode control register.(W)
C_MODE_STOP: EQU $5A ; Enter STOP mode.(W)
C_MODE_HALT: EQU $A5 ; Enter HALT mode.(W)
C_MODE_Reset: EQU $66 ; Reset all of internal modules except CPU.(W)
;
P_WDT_Ctrl: EQU $32 ; Watchdog control register.
C_WDT_EN: EQU %10000000 ; Watchdog enable bit in stop mode.(A)
; Selection bits of watchdog interrupt rate.(A)
C_WDT_RTO: EQU %00000000 ; RTO from Timer0 is selected.
C_WDT_Div_256: EQU %00010000 ; WDI clock = /256.
C_WDT_Div_512: EQU %00100000 ; WDI clock = /512.
C_WDT_Div_1024: EQU %00110000 ; WDI clock = /1024.
C_WDT_Div_2048: EQU %01000000 ; WDI clock = /2048.
C_WDT_Div_4096: EQU %01010000 ; WDI clock = /4096.
C_WDT_Div_8192: EQU %01100000 ; WDI clock = /8192.
C_WDT_Div_16384: EQU %01110000 ; WDI clock = /16384.
;
P_IRQ_Opt1: EQU $34 ; IRQ Option 1 register.
C_IRQOpt1_IRQ1ES: EQU %00001000 ; polarity Control of Interrupt Input on PC.(A)
C_IRQOpt1_IRQM1: EQU %00000100 ; polarity Control of Interrupt Input on PB1.(A)
C_IRQOpt1_IRQ0ES: EQU %00000010 ; polarity Control of Interrupt Input on PB0&PA[5:0].(A)
C_IRQOpt1_IRQM0: EQU %00000001 ; IRQ Trig Mode on IRQ0.(A)
;
P_IO_Opt: EQU $35 ; I/O slew rate control register.
C_IO_SLOWE: EQU %00000001 ; PB[7:6] slew rate enable selection.(A)
;
P_LVR_Opt: EQU $36 ; LVR Option
C_LVR_V40: EQU %00000001 ; LVR level select bit.(A)
;
;-----------------------------------------------------------------------------------------------------
P_CAP_Ctrl: EQU $58 ; Capture control
C_CAP_OPT: EQU %10000000 ; Capture option control bit.(A)
C_CAP1_ES: EQU %00000010 ; Polarity control of capture1 interrupt.
C_CAP0_ES: EQU %00000001 ; Polarity control of capture0 interrupt.
;
;-----------------------------------------------------------------------------------------------------
P_IOA_Buf: EQU $59
C_IOA_Buf7: EQU %10000000 ; PDA7: Data Control of PORTA bit7
C_IOA_Buf6: EQU %01000000 ; PDA6: Data Control of PORTA bit6
C_IOA_Buf5: EQU %00100000 ; PDA5: Data Control of PORTA bit5
C_IOA_Buf4: EQU %00010000 ; PDA4: Data Control of PORTA bit4
C_IOA_Buf3: EQU %00001000 ; PDA3: Data Control of PORTA bit3
C_IOA_Buf2: EQU %00000100 ; PDA2: Data Control of PORTA bit2
C_IOA_Buf1: EQU %00000010 ; PDA1: Data Control of PORTA bit1
C_IOA_Buf0: EQU %00000001 ; PDA0: Data Control of PORTA bit0
P_IOB_Buf: EQU $5A
C_IOB_Buf6: EQU %01000000 ; PDB6: Data Control of PORTB bit6
C_IOB_Buf5: EQU %00100000 ; PDB5: Data Control of PORTB bit5
C_IOB_Buf4: EQU %00010000 ; PDB4: Data Control of PORTB bit4
C_IOB_Buf3: EQU %00001000 ; PDB3: Data Control of PORTB bit3
C_IOB_Buf1: EQU %00000010 ; PDB1: Data Control of PORTB bit1
C_RAM_ADDR: EQU $60 ; RAM Start Address
C_STACK_BOTTOM: EQU $0FF ; Stack Bottom Address
.ENDIF
.IFDEF SPMC65P2204Ax
;=======================================================================
;SPMC65P2204A Input/Output Ports and Data Direction Registers
;=======================================================================
P_IOA_Data: EQU $00 ; Port A data b0~b7(A)
P_IOB_Data: EQU $01 ; Port B data b0~b7 except for PB2(A)
P_IOA_Dir: EQU $04 ; Port A direction control b0~b7(W), 0=In, 1=Out
P_IOB_Dir: EQU $05 ; Port B direction control b0~b7 except for PB2(A)
P_IOA_Attrib: EQU $08 ; Port A attribute register b0~b7(W)
P_IOB_Attrib: EQU $09 ; Port B attribute register b0~b7 except for PB2(A)
;
;-----------------------------------------------------------------------------------------------------
P_INT_Flag0: EQU $0C ; Interrupt Flag 0.(A)
C_INT_ADIF: EQU %10000000 ; A/D INT flag bit.(A)
C_INT_WDIF: EQU %01000000 ; WDT INT flag bit.(A)
C_INT_IRQ1F: EQU %00000010 ; IRQ1 INT flag bit.(A)
C_INT_IRQ0F: EQU %00000001 ; IRQ0 INT flag bit.(A)
;
P_INT_Ctrl0: EQU $0D ; Interrupt control 0.(A)
C_INT_ADIE: EQU %10000000 ; A/D INT enable bit.(A)
C_INT_WDIE: EQU %01000000 ; WDT INT enable bit.(A)
C_INT_IRQ1E: EQU %00000010 ; IRQ1 INT enable bit.(A)
C_INT_IRQ0E: EQU %00000001 ; IRQ0 INT enable bit.(A)
;
P_INT_Flag1: EQU $0E ; Interrupt flag 1.
C_INT_CAP1IF: EQU %10000000 ; Capture1 INT flag bit.(A)
C_INT_CAP0IF: EQU %01000000 ; Capture0 INT flag bit.(A)
C_INT_T1OIF: EQU %00000010 ; Timer1 overflow INT flag bit.(A)
C_INT_T0OIF: EQU %00000001 ; Timer0 overflow INT flag bit.(A)
;
P_INT_Ctrl1: EQU $0F ; Interrupt control 1.
C_INT_CAP1IE: EQU %10000000 ; Capture1 INT enable bit.(A)
C_INT_CAP0IE: EQU %01000000 ; Capture0 INT enable bit.(A)
C_INT_T1OIE: EQU %00000010 ; Timer1 overflow INT enable bit.(A)
C_INT_T0OIE: EQU %00000001 ; Timer0 overflow INT enable bit.(A)
;
P_INT_Flag2: EQU $26 ; Interrupt flag 2.
C_INT_TVALIF: EQU %00100000 ; Timer Base interrupt flag.
;
P_INT_Ctrl2: EQU $27 ; Interrupt control 2.
C_INT_TVALIE: EQU %00100000 ; Timer Base interrupt enable bit.
;
P_WDT_Clr: EQU $10 ; Watchdog clear register.(W), $55= clear
C_WDT_Clr: EQU $55 ; Write '55' to clear this register.
;
;-----------------------------------------------------------------------------------------------------
P_TMR0_1_Ctrl0: EQU $11 ; Timer0/1 control 0.
C_T112B_PWM: EQU %01110000 ; Timer1 Function as 12 Bit PWM
C_T116B_CAP: EQU %01100000 ; Timer1 Function as 16 Bit Capture
C_T116B_COMP: EQU %01010000 ; Timer1 Function as 16 Bit Compare
C_T116B_Timer: EQU %01000000 ; Timer1 Function as 16 Bit Timer
C_T18B_CAP: EQU %00110000 ; Timer1 Function as 8 Bit Capture
C_T18B_COMP: EQU %00100000 ; Timer1 Function as 8 Bit Compare
C_T18B_Timer: EQU %00010000 ; Timer1 Function as 8 Bit Timer
C_T08B_CAP: EQU %00000011 ; Timer0 Function as 8 Bit Capture
C_T08B_COMP: EQU %00000010 ; Timer0 Function as 8 Bit Compare
C_T08B_Timer: EQU %00000001 ; Timer0 Function as 8 Bit Timer
;
P_TMR0_1_Ctrl1: EQU $12 ; Timer0/1 control 1.
C_T1EXT_EN: EQU %01110000 ; External Event
C_T1FCS_Div_512: EQU %01100000 ; Timer1 Clock= FCS / 512
C_T1FCS_Div_128: EQU %01010000 ; Timer1 Clock= FCS / 128
C_T1FCS_Div_32: EQU %01000000 ; Timer1 Clock= FCS / 32
C_T1FCS_Div_8: EQU %00110000 ; Timer1 Clock= FCS / 8
C_T1FCS_Div_4: EQU %00100000 ; Timer1 Clock= FCS / 4
C_T1FCS_Div_2: EQU %00010000 ; Timer1 Clock= FCS / 2
C_T1FCS_Div_1: EQU %00000000 ; Timer1 Clock= FCS / 1
C_T0EXT_EN: EQU %00000111 ; External Event
C_T0FCS_Div_512: EQU %00000110 ; Timer0 Clock= FCS / 512
C_T0FCS_Div_128: EQU %00000101 ; Timer0 Clock= FCS / 128
C_T0FCS_Div_32: EQU %00000100 ; Timer0 Clock= FCS / 32
C_T0FCS_Div_8: EQU %00000011 ; Timer0 Clock= FCS / 8
C_T0FCS_Div_4: EQU %000⌨️ 快捷键说明
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