📄 spmc65.inc
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C_Ent_Stop: EQU $5A ; Enter STOP mode.(W)
C_Per_Reset: EQU $66 ; Reset all of internal block except CPU.(W)
;
P_WDT_Ctrl: EQU $32 ; Watchdog control register.
C_WDT_En: EQU 10000000B ; Watchdog Enable bit in stop mode.(A)
; Selection bits of watchdog interrupt rate.(A)
C_WDT_RTO: EQU %00000000 ; RTO from Timer0 is selected.
C_WDT_93Hz: EQU %00010000 ; WDI clock = 93.7Hz.
C_WDT_46Hz: EQU %00100000 ; WDI clock = 46.9Hz.
C_WDT_23Hz: EQU %00110000 ; WDI clock = 23.4Hz.
C_WDT_11Hz: EQU %01000000 ; WDI clock = 11.7Hz.
C_WDT_5P8Hz: EQU %01010000 ; WDI clock = 5.8Hz.
C_WDT_2P9Hz: EQU %01100000 ; WDI clock = 2.9Hz.
C_WDT_1P5Hz: EQU %01110000 ; WDI clock = 1.5Hz.
C_WDT_FSEL: EQU %00000010 ; Timer Clock Divisor. 0:Fcpu/1. 1:Fcpu/4.(A)
;
P_SGR: EQU $33 ; System Guard Register.(A)
P_IRQ_Opt: EQU $34 ; IRQ Option register.
C_IRQOpt_PCIE: EQU %10000000 ; Alternative Input on PC for IRQ2.(A)
C_IRQOpt_PB1IE: EQU %01000000 ; Alternative Input on PB1 for IRQ1.(A)
C_IRQOpt_PB0IE: EQU %00100000 ; Alternative Input on PB0 for IRQ0.(A)
C_IRQOpt_PAIE: EQU %00010000 ; Alternative Input on PA[5:0] for IRQ0.(A)
C_IRQOpt_IRQES2:EQU %00001000 ; polarity Control of Interrupt Input on PC.(A)
C_IRQOpt_IRQES1:EQU %00000100 ; polarity Control of Interrupt Input on PB1.(A)
C_IRQOpt_IRQES0:EQU %00000010 ; polarity Control of Interrupt Input on PB0&PA[5:0].(A)
C_IRQOpt_IRQM0: EQU %00000001 ; IRQ Trig Mode on IRQ0.(A)
;
P_IO_Opt: EQU $35 ; I/O slew rate control register.
C_IO_SLOWE: EQU %00000001 ; Slow Transition Enable.(A)
;
P_LVR_Opt: EQU $36 ; LVR Option
C_LVR_V40: EQU %00000001 ; LVR level select bit.(A)
;
P_PLL_Ctrl: EQU $37 ; PLL control.
C_PLL_HSCKEN: EQU %10000000 ; PLL high speed clock enable bit.(A)
C_PLL_C32KES: EQU %01000000 ; Sleep mode 32KHz clock enable bit.(A)
; Selection PLL clock speed.(A)
C_PLL_2P67MHZ: EQU %00000000 ; Set PLL 2.67MHz(default).
C_PLL_3P43MHZ: EQU %00000001 ; Set PLL 3.43MHz.
C_PLL_4P19MHZ: EQU %00000010 ; Set PLL 4.19MHz.
C_PLL_4P95MHZ: EQU %00000011 ; Set PLL 4.95MHz.
C_PLL_5P71MHZ: EQU %00000100 ; Set PLL 5.71MHz.
C_PLL_6P47MHZ: EQU %00000101 ; Set PLL 6.47MHz.
C_PLL_7P23MHZ: EQU %00000110 ; Set PLL 7.23MHz.
C_PLL_8P00MHZ: EQU %00000111 ; Set PLL 8.00MHz.
;
P_IRQ0_OptA: EQU $38 ; IRQ0 PA[5:0]group interrupt option.
P_IRQ2_OptC: EQU $39 ; IRQ2 PC[7:0]group interrupt option.
;
P_LCD_Seg_Cfg: EQU $40 ; LCD segment configuration
C_LCD_SEN7: EQU %10000000 ; PF[7:0] as SEG[18:25] enable bit
C_LCD_SEN6: EQU %01000000 ; PE[7:6] as SEG[26:27] enable bit
C_LCD_SEN5: EQU %00100000 ; PE[5:4] as SEG[28:29] enable bit
C_LCD_SEN4: EQU %00010000 ; PE[3:2] as SEG[30:31] enable bit
C_LCD_SEN3: EQU %00001000 ; PE[1:0] as SEG[32:33] enable bit
C_LCD_SEN2: EQU %00000100 ; PD[7:6] as SEG[34:35] enable bit
C_LCD_SEN1: EQU %00000010 ; PD5 as SEG36 enable bit
C_LCD_SEN0: EQU %00000001 ; PD4 as SEG37 enable bit
;
;=======================================================================
C_RAM_ADDR: EQU $80 ;RAM Start Address
C_LCD_ADDR1: EQU $300 ;LCD Start Address
C_LCD_ADDR2: EQU $320 ;LCD Start Address
C_STACK_BOTTOM: EQU $0FF ; Stack Bottom Address
.ENDIF
.IFDEF ECMC653Ax
;=======================================================================
;ECMC653 Input/Output Ports and Data Direction Registers
;=======================================================================
P_IOA_Data: EQU $00 ; Port A data b0~b7.(A)
P_IOB_Data: EQU $01 ; Port B data b0~b7.(A)
P_IOC_Data: EQU $02 ; Port C data b0~b7.(A)
P_IOD_Data: EQU $03 ; Port D data b0~b7.(A)
P_IOA_Dir: EQU $04 ; Port A direction control b0~b7.(W), 0=In, 1=Out
P_IOB_Dir: EQU $05 ; Port B direction control b0~b7.(W)
P_IOC_Dir: EQU $06 ; Port C direction control b0~b7.(W)
P_IOD_Dir: EQU $07 ; Port D direction control b0~b7.(W)
P_IOA_Attrib: EQU $08 ; Port A attribute register b0~b7.(W)
P_IOB_Attrib: EQU $09 ; Port B attribute register b0~b7.(W)
P_IOC_Attrib: EQU $0A ; Port C attribute register b0~b7.(W)
P_IOD_Attrib: EQU $0B ; Port D attribute register b0~b7.(W)
;
;-----------------------------------------------------------------------------------------------------
P_INT_Flag0: EQU $0C ; Interrupt Flag 0.(A)
C_INT_ADIF: EQU %10000000 ; A/D INT flag bit.(A)
C_INT_WDIF: EQU %01000000 ; WDT INT flag bit.(A)
C_INT_IRQ5F: EQU %00100000 ; IRQ5 INT flag bit.(A)
C_INT_IRQ4F: EQU %00010000 ; IRQ4 INT flag bit.(A)
C_INT_IRQ3F: EQU %00001000 ; IRQ3 INT flag bit.(A)
C_INT_IRQ2F: EQU %00000100 ; IRQ2 INT flag bit.(A)
C_INT_IRQ1F: EQU %00000010 ; IRQ1 INT flag bit.(A)
C_INT_IRQ0F: EQU %00000001 ; IRQ0 INT flag bit.(A)
C_INT_CAP5F: EQU %00100000 ; CAP5 INT flag bit.(A)
C_INT_CAP4F: EQU %00010000 ; CAP4 INT flag bit.(A)
C_INT_CAP3F: EQU %00000010 ; CAP3 INT flag bit.(A)
C_INT_CAP2F: EQU %00000001 ; CAP2 INT flag bit.(A)
;
P_INT_Ctrl0: EQU $0D ; Interrupt control 0.(A)
C_INT_ADIE: EQU %10000000 ; A/D INT enable bit.(A)
C_INT_WDIE: EQU %01000000 ; WDT INT enable bit.(A)
C_INT_IRQ5E: EQU %00100000 ; IRQ5 INT enable bit.(A)
C_INT_IRQ4E: EQU %00010000 ; IRQ4 INT enable bit.(A)
C_INT_IRQ3E: EQU %00001000 ; IRQ3 INT enable bit.(A)
C_INT_IRQ2E: EQU %00000100 ; IRQ2 INT enable bit.(A)
C_INT_IRQ1E: EQU %00000010 ; IRQ1 INT enable bit.(A)
C_INT_IRQ0E: EQU %00000001 ; IRQ0 INT enable bit.(A)
C_INT_CAP5IE: EQU %00100000 ; Capture5 INT enable bit.(A)
C_INT_CAP4IE: EQU %00010000 ; Capture4 INT enable bit.(A)
C_INT_CAP3IE: EQU %00000010 ; Capture3 INT enable bit.(A)
C_INT_CAP2IE: EQU %00000001 ; Capture2 INT enable bit.(A)
;
P_INT_Flag1: EQU $0E ; Interrupt flag 1.
C_INT_CAP1IF: EQU %10000000 ; Capture1 INT flag bit.(A)
C_INT_CAP0IF: EQU %01000000 ; Capture0 INT flag bit.(A)
C_INT_T5OIF: EQU %00100000 ; Timer5 overflow INT flag bit.(A)
C_INT_T4OIF: EQU %00010000 ; Timer4 overflow INT flag bit.(A)
C_INT_T3OIF: EQU %00001000 ; Timer3 overflow INT flag bit.(A)
C_INT_T2OIF: EQU %00000100 ; Timer2 overflow INT flag bit.(A)
C_INT_T1OIF: EQU %00000010 ; Timer1 overflow INT flag bit.(A)
C_INT_T0OIF: EQU %00000001 ; Timer0 overflow INT flag bit.(A)
;
P_INT_Ctrl1: EQU $0F ; Interrupt control 1.
C_INT_CAP1IE: EQU %10000000 ; Capture1 INT enable bit.(A)
C_INT_CAP0IE: EQU %01000000 ; Capture0 INT enable bit.(A)
C_INT_T5OIE: EQU %00100000 ; Timer5 overflow INT enable bit.(A)
C_INT_T4OIE: EQU %00010000 ; Timer4 overflow INT enable bit.(A)
C_INT_T3OIE: EQU %00001000 ; Timer3 overflow INT enable bit.(A)
C_INT_T2OIE: EQU %00000100 ; Timer2 overflow INT enable bit.(A)
C_INT_T1OIE: EQU %00000010 ; Timer1 overflow INT enable bit.(A)
C_INT_T0OIE: EQU %00000001 ; Timer0 overflow INT enable bit.(A)
;
P_INT_Flag2: EQU $26 ; Interrupt flag 2.
C_INT_TVALIF: EQU %00100000 ; Timer Base interrupt flag.
C_INT_IICSIF: EQU %00010000 ; IIC and S+ series interrupt flag.
C_INT_UARTIF: EQU %00001000 ; UART interrupt flag.
C_INT_SPIIF: EQU %00000100 ; SPI interrupt flag.
C_INT_CMP1IF: EQU %00000010 ; Comparator 1 interrupt flag.
C_INT_CMP0IF: EQU %00000001 ; Comparator 0 interrupt flag.
;
P_INT_Ctrl2: EQU $27 ; Interrupt control 2.
C_INT_TVALIE: EQU %00100000 ; Timer Base interrupt enable bit.
C_INT_CMP1IE: EQU %00000010 ; Comparator 1 interrupt enable bit.
C_INT_CMP0IE: EQU %00000001 ; Comparator 0 interrupt enable bit.
;
P_WDT_Clr: EQU $10 ; Watchdog clear register.(W), $55= clear
C_WDT_Clr: EQU $55 ; Write '55' to clear this register.
;
;-----------------------------------------------------------------------------------------------------
P_TMR0_1_Ctrl0: EQU $11 ; Timer0/1 control 0.
C_T112B_PWM: EQU %01110000 ; Timer1 Function as 12 Bit PWM.
C_T116B_CAP: EQU %01100000 ; Timer1 Function as 16 Bit Capture(Width).
C_T116B_COMP: EQU %01010000 ; Timer1 Function as 16 Bit Compare.
C_T116B_Timer: EQU %01000000 ; Timer1 Function as 16 Bit Timer.
C_T18B_CAP: EQU %00110000 ; Timer1 Function as 8 Bit Capture(Width,Cycle).
C_T18B_COMP: EQU %00100000 ; Timer1 Function as 8 Bit Compare.
C_T18B_Timer: EQU %00010000 ; Timer1 Function as 8 Bit Timer.
C_T08B_PWM: EQU %00000111 ; Timer0 Function as 8 Bit PWM.
C_T016B_CAP: EQU %00000110 ; Timer0 Function as 16 Bit Capture(Width).
C_T016B_COMP: EQU %00000101 ; Timer0 Function as 16 Bit Compare.
C_T016B_Timer: EQU %00000100 ; Timer0 Function as 16 Bit Timer.
C_T08B_CAP: EQU %00000011 ; Timer0 Function as 8 Bit Capture(Width,Cycle).
C_T08B_COMP: EQU %00000010 ; Timer0 Function as 8 Bit Compare.
C_T08B_Timer: EQU %00000001 ; Timer0 Function as 8 Bit Timer.
P_TMR0_1_Ctrl1: EQU $12 ; Timer0/1 control 1.
C_T1EXT_EN: EQU %01110000 ; External Event
C_T1FCS_Div_512: EQU %01100000 ; Timer1 Clock= FCS/512.
C_T1FCS_Div_128: EQU %01010000 ; Timer1 Clock= FCS/128.
C_T1FCS_Div_32: EQU %01000000 ; Timer1 Clock= FCS/32.
C_T1FCS_Div_8: EQU %00110000 ; Timer1 Clock= FCS/8.
C_T1FCS_Div_4: EQU %00100000 ; Timer1 Clock= FCS/4.
C_T1FCS_Div_2: EQU %00010000 ; Timer1 Clock= FCS/2.
C_T1FCS_Div_1: EQU %00000000 ; Timer1 Clock= FCS/1.
C_T0EXT_EN: EQU %00000111 ; External Event
C_T0FCS_Div_512: EQU %00000110 ; Timer0 Clock= FCS/512.
C_T0FCS_Div_128: EQU %00000101 ; Timer0 Clock= FCS/128.
C_T0FCS_Div_32: EQU %00000100 ; Timer0 Clock= FCS/32.
C_T0FCS_Div_8: EQU %00000011 ; Timer0 Clock= FCS/8.
C_T0FCS_Div_4: EQU %00000010 ; Timer0 Clock= FCS/4.
C_T0FCS_Div_2: EQU %00000001 ; Timer0 Clock= FCS/2.
C_T0FCS_Div_1: EQU %00000000 ; Timer0 Clock= FCS/1.
P_TMR0_Data0: EQU $13 ; Timer0 8-bit counter register.(R)
P_TMR0_PreloadLo: EQU $13 ; Timer0 8-bit preload register.(W)
P_TMR0_CompLo: EQU $13 ; Timer0 compare low byte value.
P_TMR0_CapLo: EQU $13 ; Timer0 capture low byte width value.
P_TMR0_PWM0: EQU $13 ; Timer0 PWM period value.
;
P_TMR0_Data1: EQU $14 ; Timer0 16-bit counter register.(R)
P_TMR0_PreloadHi: EQU $14 ; Timer0 16-bit preload register.(W)
P_TMR0_CompHi: EQU $14 ; Timer0 compare high byte value.
P_TMR0_CapHi: EQU $14 ; Timer0 capture high byte width value.
P_TMR0_CapCycle8: EQU $14 ; Timer0 8-bit capture cycle value.(R)
P_TMR0_PWM1: EQU $14 ; Timer0 PWM duty value.
;
P_TMR1_Data0: EQU $15 ; Timer1 8-bit Counter register.(R)
P_TMR1_PreloadLo: EQU $15 ; Timer1 8-bit preload register.(W)
P_TMR1_CompLo: EQU $15 ; Timer1 compare low byte value.
P_TMR1_CapLo: EQU $15 ; Timer1 capture low byte width value.
P_TMR1_PWM0: EQU $15 ; Timer1 PWM peroid low byte register.
;
P_TMR1_Data1: EQU $16 ; Timer1 16-bit Counter register.(R)
P_TMR1_PreloadHi: EQU $16 ; Timer1 16-bit preload register.(W)
P_TMR1_CompHi: EQU $16 ; Timer1 compare high byte value.
P_TMR1_CapHi: EQU $16 ; Timer1 capture high byte width value.
P_TMR1_CapCycle8: EQU $16 ; Timer1 8-bit capture cycle value.(R)
P_TMR1_PWM1: EQU $16 ; Timer1 PWM high byte register.
C_TMR1_PWMDuty: EQU %11110000 ; Timer1 PWM duty high byte value.
C_TMR1_PWMPeriod: EQU %00001111 ; Timer1 PWM peroid high byte value.
;
P_TMR1_PWM2: EQU $17 ; Timer1 PWM duty low byte register.
;
P_TMR2_3_Ctrl0: EQU $18 ; Timer2/3 control 0.
C_T312B_PWM: EQU %01110000 ; Timer3 Function as 12 Bit PWM.
C_T316B_CAP: EQU %01100000 ; Timer3 Function as 16 Bit Capture(Width).
C_T316B_COMP: EQU %01010000 ; Timer3 Function as 16 Bit Compare.
C_T316B_Timer: EQU %01000000 ; Timer3 Function as 16 Bit Timer.
C_T38B_CAP: EQU %00110000 ; Timer3 Function as 8 Bit Capture(Width,Cycle).
C_T38B_COMP: EQU %00100000 ; Timer3 Function as 8 Bit Compare.
C_T38B_Timer: EQU %00010000 ; Timer3 Function as 8 Bit Timer.
C_T28B_PWM: EQU %00000111 ; Timer2 Function as 8 Bit PWM.
C_T216B_CAP: EQU %00000110 ; Timer2 Function as 16 Bit Capture(Width).
C_T216B_COMP: EQU %00000101 ; Timer2 Function as 16 Bit Compare.
C_T216B_Timer: EQU %00000100 ; Timer2 Function as 16 Bit Timer.
C_T28B_CAP: EQU %00000011 ; Timer2 Function as 8 Bit Capture(Width,Cycle).
C_T28B_COMP: EQU %00000010 ; Timer2 Function as 8 Bit Compare.
C_T28B_Timer: EQU %00000001 ; Timer2 Function as 8 Bit Timer.
;
P_TMR2_3_Ctrl1: EQU $19 ; Timer2/3 control 1.
C_T3EXT_EN: EQU %01110000 ; External Event.
C_T3FCS_Div_512: EQU %01100000 ; Timer3 Clock= FCS/512.
C_T3FCS_Div_128: EQU %01010000 ; Timer3 Clock= FCS/128.
C_T3FCS_Div_32: EQU %01000000 ; Timer3 Clock= FCS/32.
C_T3FCS_Div_8: EQU %00110000 ; Timer3 Clock= FCS/8.
C_T3FCS_Div_4: EQU %00100000 ; Timer3 Clock= FCS/4.
C_T3FCS_Div_2: EQU %00010000 ; Timer3 Clock= FCS/2.
C_T3FCS_Div_1: EQU %00000000 ; Timer3 Clock= FCS/1.
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