gpio.h

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/******************************************************************
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GPIO.H  file

作者：Computer-lov
建立日期: 2008.07.12
修改日期: 2008.07.12
版本：V1.2
版权所有，盗版必究。
Copyright(C) Computer-lov 2008-2018
All rights reserved            
*******************************************************************/

#ifndef __GPIO_H__
#define __GPIO_H__

//GPIOx base address
#define GPIOA_BASE 0x40010800
#define GPIOB_BASE 0x40010C00
#define GPIOC_BASE 0x40011000
#define GPIOD_BASE 0x40011400
#define GPIOE_BASE 0x40011800

//Port configuration register low (GPIOx_CRL) (x=A..E)

//Bits 29:28, 25:24, 21:20, 17:16, 13:12, 9:8, 5:4, 1:0
//MODEy[1:0]: Port x mode bits (y= 0 .. 7)
//These bits are written by software to configure the corresponding I/O port.
//00: Input mode (reset state)
//01: Output mode, max speed 10 MHz.
//10: Output mode, max speed 2 MHz.
//11: Output mode, max speed 50 MHz.

//Bits 31:30, 27:26, 23:22, 19:18, 15:14, 11:10, 7:6, 3:2
//CNFy[1:0]: Port x configuration bits (y= 0 .. 7)
//These bits are written by software to configure the corresponding I/O port.
//In input mode (MODE[1:0]=00):
//00: Analog input mode
//01: Floating input (reset state)
//10: Input with pull-up / pull-down
//11: Reserved
//In output mode (MODE[1:0] > 00):
//00: General purpose output push-pull
//01: General purpose output Open-drain
//10: Alternate function output Push-pull
//11: Alternate function output Open-drain

#define GPIOA_CRL (*((volatile unsigned int *)(GPIOA_BASE+0x00)))
#define GPIOB_CRL (*((volatile unsigned int *)(GPIOB_BASE+0x00)))
#define GPIOC_CRL (*((volatile unsigned int *)(GPIOC_BASE+0x00)))
#define GPIOD_CRL (*((volatile unsigned int *)(GPIOD_BASE+0x00)))
#define GPIOE_CRL (*((volatile unsigned int *)(GPIOE_BASE+0x00)))

//Port configuration register high (GPIOx_CRH) (x=A..E)

//Bits 29:28, 25:24, 21:20, 17:16, 13:12, 9:8, 5:4, 1:0
//MODEy[1:0]: Port x mode bits (y= 8 .. 15)
//These bits are written by software to configure the corresponding I/O port.
//00: Input mode (reset state)
//01: Output mode, max speed 10 MHz.
//10: Output mode, max speed 2 MHz.
//11: Output mode, max speed 50 MHz.

//Bits 31:30, 27:26, 23:22, 19:18, 15:14, 11:10, 7:6, 3:2
//CNFy[1:0]: Port x configuration bits (y= 8 .. 15)
//These bits are written by software to configure the corresponding I/O port.
//In input mode (MODE[1:0]=00):
//00: Analog input mode
//01: Floating input (reset state)
//10: Input with pull-up / pull-down
//11: Reserved
//In output mode (MODE[1:0] > 00):
//00: General purpose output push-pull
//01: General purpose output Open-drain
//10: Alternate function output Push-pull
//11: Alternate function output Open-drain

#define GPIOA_CRH (*((volatile unsigned int *)(GPIOA_BASE+0x04)))
#define GPIOB_CRH (*((volatile unsigned int *)(GPIOB_BASE+0x04)))
#define GPIOC_CRH (*((volatile unsigned int *)(GPIOC_BASE+0x04)))
#define GPIOD_CRH (*((volatile unsigned int *)(GPIOD_BASE+0x04)))
#define GPIOE_CRH (*((volatile unsigned int *)(GPIOE_BASE+0x04)))

//Port input data register (GPIOx_IDR) (x=A..E)
#define GPIOA_IDR (*((volatile unsigned int *)(GPIOA_BASE+0x08)))
#define GPIOB_IDR (*((volatile unsigned int *)(GPIOB_BASE+0x08)))
#define GPIOC_IDR (*((volatile unsigned int *)(GPIOC_BASE+0x08)))
#define GPIOD_IDR (*((volatile unsigned int *)(GPIOD_BASE+0x08)))
#define GPIOE_IDR (*((volatile unsigned int *)(GPIOE_BASE+0x08)))

//Port output data register (GPIOx_ODR) (x=A..E)
#define GPIOA_ODR (*((volatile unsigned int *)(GPIOA_BASE+0x0C)))
#define GPIOB_ODR (*((volatile unsigned int *)(GPIOB_BASE+0x0C)))
#define GPIOC_ODR (*((volatile unsigned int *)(GPIOC_BASE+0x0C)))
#define GPIOD_ODR (*((volatile unsigned int *)(GPIOD_BASE+0x0C)))
#define GPIOE_ODR (*((volatile unsigned int *)(GPIOE_BASE+0x0C)))

//Port bit set/reset register (GPIOx_BSRR) (x=A..E)
#define GPIOA_BSRR (*((volatile unsigned int *)(GPIOA_BASE+0x10)))
#define GPIOB_BSRR (*((volatile unsigned int *)(GPIOB_BASE+0x10)))
#define GPIOC_BSRR (*((volatile unsigned int *)(GPIOC_BASE+0x10)))
#define GPIOD_BSRR (*((volatile unsigned int *)(GPIOD_BASE+0x10)))
#define GPIOE_BSRR (*((volatile unsigned int *)(GPIOE_BASE+0x10)))

//Port bit reset register (GPIOx_BRR) (x=A..E)
#define GPIOA_BRR (*((volatile unsigned int *)(GPIOA_BASE+0x14)))
#define GPIOB_BRR (*((volatile unsigned int *)(GPIOB_BASE+0x14)))
#define GPIOC_BRR (*((volatile unsigned int *)(GPIOC_BASE+0x14)))
#define GPIOD_BRR (*((volatile unsigned int *)(GPIOD_BASE+0x14)))
#define GPIOE_BRR (*((volatile unsigned int *)(GPIOE_BASE+0x14)))

//Port configuration lock register (GPIOx_LCKR) (x=A..E)
#define GPIOA_LCKR (*((volatile unsigned int *)(GPIOA_BASE+0x18)))
#define GPIOB_LCKR (*((volatile unsigned int *)(GPIOB_BASE+0x18)))
#define GPIOC_LCKR (*((volatile unsigned int *)(GPIOC_BASE+0x18)))
#define GPIOD_LCKR (*((volatile unsigned int *)(GPIOD_BASE+0x18)))
#define GPIOE_LCKR (*((volatile unsigned int *)(GPIOE_BASE+0x18)))

//Bit field of GPIOx_CRL and GPIOx_CRH
typedef struct bGPIOx_CRL
{
 unsigned int MODE0 :2;
 unsigned int CNF0  :2;
 unsigned int MODE1 :2;
 unsigned int CNF1  :2;
 unsigned int MODE2 :2;
 unsigned int CNF2  :2;
 unsigned int MODE3 :2;
 unsigned int CNF3  :2;
 unsigned int MODE4 :2;
 unsigned int CNF4  :2;
 unsigned int MODE5 :2;
 unsigned int CNF5  :2;
 unsigned int MODE6 :2;
 unsigned int CNF6  :2;
 unsigned int MODE7 :2;
 unsigned int CNF7  :2;
}bGPIOx_CRL;

typedef struct bGPIOx_CRH
{
 unsigned int MODE8 :2;
 unsigned int CNF8  :2;
 unsigned int MODE9 :2;
 unsigned int CNF9  :2;
 unsigned int MODE10 :2;
 unsigned int CNF10  :2;
 unsigned int MODE11 :2;
 unsigned int CNF11  :2;
 unsigned int MODE12 :2;
 unsigned int CNF12  :2;
 unsigned int MODE13 :2;
 unsigned int CNF13  :2;
 unsigned int MODE14 :2;
 unsigned int CNF14  :2;
 unsigned int MODE15 :2;
 unsigned int CNF15  :2;
}bGPIOx_CRH;

//GPIOA MODE
#define GPIOA_MODE0 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->MODE0)
#define GPIOA_MODE1 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->MODE1)
#define GPIOA_MODE2 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->MODE2)
#define GPIOA_MODE3 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->MODE3)
#define GPIOA_MODE4 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->MODE4)
#define GPIOA_MODE5 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->MODE5)
#define GPIOA_MODE6 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->MODE6)
#define GPIOA_MODE7 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->MODE7)
#define GPIOA_MODE8 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->MODE8)
#define GPIOA_MODE9 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->MODE9)
#define GPIOA_MODE10 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->MODE10)
#define GPIOA_MODE11 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->MODE11)
#define GPIOA_MODE12 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->MODE12)
#define GPIOA_MODE13 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->MODE13)
#define GPIOA_MODE14 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->MODE14)
#define GPIOA_MODE15 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->MODE15)

//GPIOA CNF(Configuration)
#define GPIOA_CNF0 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->CNF0)
#define GPIOA_CNF1 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->CNF1)
#define GPIOA_CNF2 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->CNF2)
#define GPIOA_CNF3 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->CNF3)
#define GPIOA_CNF4 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->CNF4)
#define GPIOA_CNF5 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->CNF5)
#define GPIOA_CNF6 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->CNF6)
#define GPIOA_CNF7 (((volatile bGPIOx_CRL *)(&GPIOA_CRL))->CNF7)
#define GPIOA_CNF8 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->CNF8)
#define GPIOA_CNF9 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->CNF9)
#define GPIOA_CNF10 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->CNF10)
#define GPIOA_CNF11 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->CNF11)
#define GPIOA_CNF12 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->CNF12)
#define GPIOA_CNF13 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->CNF13)
#define GPIOA_CNF14 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->CNF14)
#define GPIOA_CNF15 (((volatile bGPIOx_CRH *)(&GPIOA_CRH))->CNF15)

//GPIOB MODE
#define GPIOB_MODE0 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->MODE0)
#define GPIOB_MODE1 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->MODE1)
#define GPIOB_MODE2 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->MODE2)
#define GPIOB_MODE3 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->MODE3)
#define GPIOB_MODE4 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->MODE4)
#define GPIOB_MODE5 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->MODE5)
#define GPIOB_MODE6 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->MODE6)
#define GPIOB_MODE7 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->MODE7)
#define GPIOB_MODE8 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->MODE8)
#define GPIOB_MODE9 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->MODE9)
#define GPIOB_MODE10 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->MODE10)
#define GPIOB_MODE11 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->MODE11)
#define GPIOB_MODE12 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->MODE12)
#define GPIOB_MODE13 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->MODE13)
#define GPIOB_MODE14 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->MODE14)
#define GPIOB_MODE15 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->MODE15)

//GPIOB CNF(Configuration)
#define GPIOB_CNF0 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->CNF0)
#define GPIOB_CNF1 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->CNF1)
#define GPIOB_CNF2 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->CNF2)
#define GPIOB_CNF3 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->CNF3)
#define GPIOB_CNF4 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->CNF4)
#define GPIOB_CNF5 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->CNF5)
#define GPIOB_CNF6 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->CNF6)
#define GPIOB_CNF7 (((volatile bGPIOx_CRL *)(&GPIOB_CRL))->CNF7)
#define GPIOB_CNF8 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->CNF8)
#define GPIOB_CNF9 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->CNF9)
#define GPIOB_CNF10 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->CNF10)
#define GPIOB_CNF11 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->CNF11)
#define GPIOB_CNF12 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->CNF12)
#define GPIOB_CNF13 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->CNF13)
#define GPIOB_CNF14 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->CNF14)
#define GPIOB_CNF15 (((volatile bGPIOx_CRH *)(&GPIOB_CRH))->CNF15)

//GPIOC MODE
#define GPIOC_MODE0 (((volatile bGPIOx_CRL *)(&GPIOC_CRL))->MODE0)
#define GPIOC_MODE1 (((volatile bGPIOx_CRL *)(&GPIOC_CRL))->MODE1)