rcc.h

基于EK—STM32开发板的LCD驱动编程实现

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RCC.H  file

作者：Computer-lov
建立日期: 2008.07.28
修改日期: 2008.07.28
版本：V1.2
版权所有，盗版必究。
Copyright(C) Computer-lov 2008-2018
All rights reserved            
*******************************************************************/

#ifndef __RCC_H__

#define RCC_BASE 0x40021000

#define RCC_CR       (*((volatile unsigned int *)(RCC_BASE+0x00)))
#define RCC_CFGR     (*((volatile unsigned int *)(RCC_BASE+0x04)))
#define RCC_CIR      (*((volatile unsigned int *)(RCC_BASE+0x08)))
#define RCC_APB2RSTR (*((volatile unsigned int *)(RCC_BASE+0x0C)))
#define RCC_APB1RSTR (*((volatile unsigned int *)(RCC_BASE+0x10)))
#define RCC_AHBENR   (*((volatile unsigned int *)(RCC_BASE+0x14)))
#define RCC_APB2ENR  (*((volatile unsigned int *)(RCC_BASE+0x18)))
#define RCC_APB1ENR  (*((volatile unsigned int *)(RCC_BASE+0x1C)))
#define RCC_BDCR     (*((volatile unsigned int *)(RCC_BASE+0x20)))
#define RCC_CSR      (*((volatile unsigned int *)(RCC_BASE+0x24)))

typedef struct 
{
 unsigned int HSION      :1;   //Internal High Speed clock enable 
 unsigned int HSIRDY     :1;   //Internal High Speed clock ready flag
 unsigned int Reserved1  :1;   //Reserved, always read as 0.
 unsigned int HSITRIM    :5;   //Internal High Speed clock trimming
 unsigned int HSICAL     :8;   //Internal High Speed clock Calibration
 unsigned int HSEON      :1;   //External High Speed clock enable
 unsigned int HSERDY     :1;   //External High Speed clock ready flag
 unsigned int HSEBYP     :1;   //External High Speed clock Bypass
 unsigned int CSSON      :1;   //Clock Security System enable
 unsigned int Reserved2  :4;   //Reserved, always read as 0.
 unsigned int PLLON      :1;   //PLL enable
 unsigned int PLLRDY     :1;   //PLL clock ready flag
 unsigned int Reserved3  :6;   //Reserved, always read as 0.
}bRCC_CR;

#define pbRCC_CR ((bRCC_CR *)(&RCC_CR))

typedef struct 
{

 unsigned int SW         :2;   //System clock Switch
 unsigned int SWS        :2;   //System Clock Switch Status
 unsigned int HPRE       :4;   //AHB prescaler
 unsigned int PPRE1      :3;   //APB Low speed prescaler (APB1)
 unsigned int PPRE2      :3;   //APB High speed prescaler (APB2)
 unsigned int ADCPRE     :2;   //ADC prescaler
 unsigned int PLLSRC     :1;   //PLL entry clock source
 unsigned int PLLXTPRE   :1;   //HSE divider for PLL entry
 unsigned int PLLMUL     :4;   //PLL Multiplication Factor
 unsigned int USBPRE     :1;   //USB prescaler
 unsigned int MCO        :3;   //Microcontroller Clock Output
 unsigned int Reserved1  :6;   //Reserved, always read as 0.
}bRCC_CFGR;

#define pbRCC_CFGR ((bRCC_CFGR *)(&RCC_CFGR))

typedef struct 
{
 unsigned int LSIRDYF    :1;   //LSI Ready Interrupt flag
 unsigned int LSERDYF    :1;   //LSE Ready Interrupt flag
 unsigned int HSIRDYF    :1;   //HSI Ready Interrupt flag
 unsigned int HSERDYF    :1;   //HSE Ready Interrupt flag
 unsigned int PLLRDYF    :1;   //PLL Ready Interrupt flag
 unsigned int Reserved1  :2;   //Reserved, always read as 0.
 unsigned int CSSF       :1;   //Clock Security System Interrupt flag
 unsigned int LSIRDYIE   :1;   //LSI Ready Interrupt Enable
 unsigned int LSERDYIE   :1;   //LSE Ready Interrupt Enable
 unsigned int HSIRDYIE   :1;   //HSI Ready Interrupt Enable
 unsigned int HSERDYIE   :1;   //HSE Ready Interrupt Enable
 unsigned int PLLRDYIE   :1;   //PLL Ready Interrupt Enable
 unsigned int Reserved2  :3;   //Reserved, always read as 0.
 unsigned int LSIRDYC    :1;   //LSI Ready Interrupt Clear
 unsigned int LSERDYC    :1;   //LSE Ready Interrupt Clear
 unsigned int HSIRDYC    :1;   //HSI Ready Interrupt Clear
 unsigned int HSERDYC    :1;   //HSE Ready Interrupt Clear
 unsigned int PLLRDYC    :1;   //PLL Ready Interrupt Clear
 unsigned int Reserved3  :2;   //Reserved, always read as 0.
 unsigned int CSSC       :1;   //Clock Security System Interrupt Clear
 unsigned int Reserved4  :8;   //Reserved, always read as 0.
}bRCC_CIR;

#define pbRCC_CIR ((bRCC_CIR *)&(RCC_CIR))

typedef struct
{
 unsigned int AFIORST    :1;   //Alternate Function I/O reset
 unsigned int Reserved1  :1;   //Reserved, always read as 0.
 unsigned int IOPARST    :1;   //IO port A reset
 unsigned int IOPBRST    :1;   //IO port B reset
 unsigned int IOPCRST    :1;   //IO port C reset
 unsigned int IOPDRST    :1;   //IO port D reset
 unsigned int IOPERST    :1;   //IO port E reset
 unsigned int Reserved2  :2;   //Reserved, always read as 0.
 unsigned int ADC1RST    :1;   //ADC 1 interface reset
 unsigned int ADC2RST    :1;   //ADC 2 interface reset
 unsigned int TIM1RST    :1;   //TIM1 Timer reset
 unsigned int SPI1RST    :1;   //SPI 1 reset
 unsigned int Reserved3  :1;   //Reserved, always read as 0.
 unsigned int USART1RST  :1;   //USART1 reset
 unsigned int Reserved4  :17;  //Reserved, always read as 0.
}bRCC_APB2RSTR;

#define pbRCC_APB2RSTR ((bRCC_APB2RSTR *)&(RCC_APB2RSTR))

typedef struct 
{
 unsigned int TIM2RST    :1;   //Timer 2 reset
 unsigned int TIM3RST    :1;   //Timer 3 reset
 unsigned int TIM4RST    :1;   //Timer 4 reset
 unsigned int Reserved1  :8;   //Reserved, always read as 0.
 unsigned int WWDGRST    :1;   //Window Watchdog reset
 unsigned int Reserved2  :2;   //Reserved, always read as 0.
 unsigned int SPI2RST    :1;   //SPI 2 reset
 unsigned int Reserved3  :2;   //Reserved, always read as 0.
 unsigned int USART2RST  :1;   //USART 2 reset
 unsigned int USART3RST  :1;   //USART 3 reset
 unsigned int Reserved4  :2;   //Reserved, always read as 0.
 unsigned int I2C1RST    :1;   //I2C 1 reset
 unsigned int I2C2RST    :1;   //I2C 2 reset
 unsigned int USBRST     :1;   //USB reset
 unsigned int Reserved5  :1;   //Reserved, always read as 0. 
 unsigned int CANRST     :1;   //CAN reset
 unsigned int Reserved6  :1;   //Reserved, always read as 0. 
 unsigned int BKPRST     :1;   //Backup interface reset
 unsigned int PWRRST     :1;   //Power interface reset
 unsigned int Reserved7  :3;   //Reserved, always read as 0.  
}bRCC_APB1RSTR;

#define pbRCC_APB1RSTR  ((bRCC_APB1RSTR *)&(RCC_APB1RSTR))

typedef struct
{
 unsigned int DMAEN      :1;   //DMA clock enable
 unsigned int Reserved1  :1;   //Reserved, always read as 0.
 unsigned int SRAMEN     :1;   //SRAM interface clock enable
 unsigned int Reserved2  :1;   //Reserved, always read as 0.
 unsigned int FLITFEN    :1;   //FLITF clock enable
 unsigned int Reserved3  :27;  //Reserved, always read as 0.
}bRCC_AHBENR;

#define pbRCC_AHBENR    ((bRCC_AHBENR *)&(RCC_AHBENR))

typedef struct
{
 unsigned int AFIOEN     :1;   //Alternate Function I/O clock enable
 unsigned int Reserved1  :1;   //Reserved, always read as 0.
 unsigned int IOPAEN     :1;   //I/O port A clock enable
 unsigned int IOPBEN     :1;   //I/O port B clock enable
 unsigned int IOPCEN     :1;   //I/O port C clock enable
 unsigned int IOPDEN     :1;   //I/O port D clock enable
 unsigned int IOPEEN     :1;   //I/O port E clock enable
 unsigned int Reserved2  :2;   //Reserved, always read as 0.
 unsigned int ADC1EN     :1;   //ADC 1 interface clock enable
 unsigned int ADC2EN     :1;   //ADC 2 interface clock enable
 unsigned int TIM1EN     :1;   //TIM1 Timer clock enable
 unsigned int SPI1EN     :1;   //SPI 1 clock enable
 unsigned int Reserved3  :1;   //Reserved, always read as 0.
 unsigned int USART1EN   :1;   //USART1 clock enable
 unsigned int Reserved4  :17;  //Reserved, always read as 0.
}bRCC_APB2ENR;
 
#define pbRCC_APB2ENR   ((bRCC_APB2ENR *)&(RCC_APB2ENR))

typedef struct
{
 unsigned int TIM2EN     :1;   //Timer 2 clock enable
 unsigned int TIM3EN     :1;   //Timer 3 clock enable
 unsigned int TIM4EN     :1;   //Timer 4 clock enable
 unsigned int Reserved1  :8;   //Reserved, always read as 0.
 unsigned int WWDGEN     :1;   //Window Watchdog clock enable
 unsigned int Reserved2  :2;   //Reserved, always read as 0.
 unsigned int SPI2EN     :1;   //SPI 2 clock enable
 unsigned int Reserved3  :2;   //Reserved, always read as 0.
 unsigned int USART2EN   :1;   //USART 2 clock enable
 unsigned int USART3EN   :1;   //USART 3 clock enable
 unsigned int Reserved4  :2;   //Reserved, always read as 0.
 unsigned int I2C1EN     :1;   //I2C 1 clock enable
 unsigned int I2C2EN     :1;   //I2C 2 clock enable
 unsigned int USBEN      :1;   //USB clock enable
 unsigned int Reserved5  :1;   //Reserved, always read as 0.
 unsigned int CANEN      :1;   //CAN clock enable
 unsigned int Reserved6  :1;   //Reserved, always read as 0.
 unsigned int BKPEN      :1;   //Backup interface clock enable
 unsigned int PWREN      :1;   //Power interface clock enable
 unsigned int Reserved7  :3;   //Reserved, always read as 0.
}bRCC_APB1ENR;

#define pbRCC_APB1ENR     ((bRCC_APB1ENR *)&(RCC_APB1ENR))

typedef struct
{
 unsigned int LSEON      :1;   //External Low Speed oscillator enable
 unsigned int LSERDY     :1;   //External Low Speed oscillator Ready
 unsigned int LSEBYP     :1;   //External Low Speed oscillator Bypass
 unsigned int Reserved1  :5;   //Reserved, always read as 0.
 unsigned int RTCSEL     :2;   //RTC clock source selection
 unsigned int Reserved2  :5;   //Reserved, always read as 0.
 unsigned int RTCEN      :1;   //RTC clock enable
 unsigned int BDRST      :1;   //Backup domain software reset
 unsigned int Reserved3  :15;  //Reserved, always read as 0.
}bRCC_BDCR;

#define pbRCC_BDCR        ((bRCC_BDCR *)&(RCC_BDCR))

typedef struct 
{
 unsigned int LSION      :1;   //Internal Low Speed oscillator enable
 unsigned int LSIRDY     :1;   //Internal Low Speed oscillator Ready
 unsigned int Reserved1  :22;  //Reserved, always read as 0.
 unsigned int RMVF       :1;   //Remove reset flag
 unsigned int Reserved2  :1;   //Reserved, always read as 0.
 unsigned int PINRSTF    :1;   //PIN reset flag
 unsigned int PORRSTF    :1;   //POR/PDR reset flag
 unsigned int SFTRSTF    :1;   //Software Reset flag
 unsigned int IWDGRSTF   :1;   //Independent Watchdog reset flag
 unsigned int WWDGRSTF   :1;   //Window watchdog reset flag
 unsigned int LPWRRSTF   :1;   //Low-Power reset flag
}bRCC_CSR;

#define pbRCC_CSR         (bRCC_CSR *)&(RCC_CSR))

#endif