📄 usart.h
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/******************************************************************
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USART.H file
作者:Computer-lov
建立日期: 2008.07.29
修改日期: 2008.07.29
版本:V1.2
版权所有,盗版必究。
Copyright(C) Computer-lov 2008-2018
All rights reserved
*******************************************************************/
#ifndef __USART_H__
#define __USART_H__
#define USART1_BASE 0x40013800
#define USART2_BASE 0x40004400
#define USART3_BASE 0x40004800
#define USART1_SR (*((unsigned int *)(USART1_BASE + 0x00)))
#define USART1_DR (*((unsigned int *)(USART1_BASE + 0x04)))
#define USART1_BRR (*((unsigned int *)(USART1_BASE + 0x08)))
#define USART1_CR1 (*((unsigned int *)(USART1_BASE + 0x0C)))
#define USART1_CR2 (*((unsigned int *)(USART1_BASE + 0x10)))
#define USART1_CR3 (*((unsigned int *)(USART1_BASE + 0x14)))
#define USART1_GTPR (*((unsigned int *)(USART1_BASE + 0x18)))
#define USART2_SR (*((unsigned int *)(USART2_BASE + 0x00)))
#define USART2_DR (*((unsigned int *)(USART2_BASE + 0x04)))
#define USART2_BRR (*((unsigned int *)(USART2_BASE + 0x08)))
#define USART2_CR1 (*((unsigned int *)(USART2_BASE + 0x0C)))
#define USART2_CR2 (*((unsigned int *)(USART2_BASE + 0x10)))
#define USART2_CR3 (*((unsigned int *)(USART2_BASE + 0x14)))
#define USART2_GTPR (*((unsigned int *)(USART2_BASE + 0x18)))
#define USART3_SR (*((unsigned int *)(USART3_BASE + 0x00)))
#define USART3_DR (*((unsigned int *)(USART3_BASE + 0x04)))
#define USART3_BRR (*((unsigned int *)(USART3_BASE + 0x08)))
#define USART3_CR1 (*((unsigned int *)(USART3_BASE + 0x0C)))
#define USART3_CR2 (*((unsigned int *)(USART3_BASE + 0x10)))
#define USART3_CR3 (*((unsigned int *)(USART3_BASE + 0x14)))
#define USART3_GTPR (*((unsigned int *)(USART3_BASE + 0x18)))
typedef struct
{
unsigned int PE :1; //Parity Error.
unsigned int FE :1; //Framing Error.
unsigned int NE :1; //Noise Error Flag.
unsigned int ORE :1; //OverRun Error.
unsigned int IDLE :1; //IDLE line detected.
unsigned int RXNE :1; //Read Data Register Not Empty.
unsigned int TC :1; //Transmission Complete.
unsigned int TXE :1; //Transmit Data Register Empty
unsigned int LBD :1; //LIN Break Detection Flag
unsigned int CTS :1; //CTS Flag
unsigned int Reserved1 :22; //Reserved, forced by hardware to 0.
}bUSART_SR;
#define pbUSART1_SR ((bUSART_SR*)(&USART1_SR))
#define pbUSART2_SR ((bUSART_SR*)(&USART2_SR))
#define pbUSART3_SR ((bUSART_SR*)(&USART3_SR))
typedef struct
{
unsigned int DR :8; //Data value.
unsigned int Reserved1 :24; //Reserved, forced by hardware to 0.
}bUSART_DR;
#define pbUSART1_DR ((bUSART_DR*)(&USART1_DR))
#define pbUSART2_DR ((bUSART_DR*)(&USART2_DR))
#define pbUSART3_DR ((bUSART_DR*)(&USART3_DR))
typedef struct
{
unsigned int DIV_Fraction :4; //fraction of DIV.
unsigned int DIV_Mantissa :12; //mantissa of DIV.
unsigned int Reserved1 :16; //Reserved, forced by hardware to 0.
}bUSART_BRR;
#define pbUSART1_BRR ((bUSART_BRR *)(&USART1_BRR))
#define pbUSART2_BRR ((bUSART_BRR *)(&USART2_BRR))
#define pbUSART3_BRR ((bUSART_BRR *)(&USART3_BRR))
typedef struct
{
unsigned int SBK :1; //Send Break.
unsigned int RWU :1; //Receiver wakeup.
unsigned int RE :1; //Receiver Enable.
unsigned int TE :1; //Transmitter Enable.
unsigned int IDLEIE :1; //IDLE Interrupt Enable.
unsigned int RXNEIE :1; //RXNE Interrupt Enable.
unsigned int TCIE :1; //Transmission Complete Interrupt Enable.
unsigned int TXEIE :1; //TXE Interrupt Enable.
unsigned int PEIE :1; //PE Interrupt Enable.
unsigned int PS :1; //Parity Selection.
unsigned int PCE :1; //Parity Control Enable.
unsigned int WAKE :1; //Wakeup method.
unsigned int M :1; //word length.
unsigned int UE :1; //USART Enable.
unsigned int Reserved1 :18; //Reserved, forced by hardware to 0.
}bUSART_CR1;
#define pbUSART1_CR1 ((bUSART_CR1*)(&USART1_CR1))
#define pbUSART2_CR1 ((bUSART_CR1*)(&USART2_CR1))
#define pbUSART3_CR1 ((bUSART_CR1*)(&USART3_CR1))
typedef struct
{
unsigned int ADD :4; //Address of the USART node.
unsigned int Reserved1 :1; //Reserved, forced by hardware to 0.
unsigned int LBDL :1; //LIN Break Detection Length.
unsigned int LBDIE :1; //LIN Break Detection Interrupt Enable.
unsigned int Reserved2 :1; //Reserved, forced by hardware to 0.
unsigned int LBCL :1; //Last Bit Clock pulse.
unsigned int CPHA :1; //Clock Phase
unsigned int CPOL :1; //Clock Polarity.
unsigned int CLKEN :1; //Clock Enable.
unsigned int STOP :2; //STOP bits.
unsigned int LINEN :1; //LIN mode enable
unsigned int Reserved3 :17; //Reserved, forced by hardware to 0.
}bUSART_CR2;
#define pbUSART1_CR2 ((bUSART_CR2 *)(&USART1_CR2))
#define pbUSART2_CR2 ((bUSART_CR2 *)(&USART2_CR2))
#define pbUSART3_CR2 ((bUSART_CR2 *)(&USART3_CR2))
typedef struct
{
unsigned int EIE :1; //Error Interrupt Enable.
unsigned int IREN :1; //IrDA mode Enable.
unsigned int IRLP :1; //IrDA Low-Power.
unsigned int HDSEL :1; //Half-Duplex Selection.
unsigned int NACK :1; //Smartcard NACK enable.
unsigned int SCEN :1; //Smartcard mode enable.
unsigned int DMAR :1; //DMA Enable Receiver.
unsigned int DMAT :1; //DMA Enable Transmitter.
unsigned int RTSE :1; //RTS Enable.
unsigned int CTSE :1; //CTS Enable.
unsigned int CTSIE :1; // CTS Interrupt Enable.
unsigned int Reserved1 :21; //Reserved, forced by hardware to 0.
}bUSART_CR3;
#define pbUSART1_CR3 ((bUSART_CR3 *)(&USART1_CR3))
#define pbUSART2_CR3 ((bUSART_CR3 *)(&USART2_CR3))
#define pbUSART3_CR3 ((bUSART_CR3 *)(&USART3_CR3))
typedef struct
{
unsigned int PSC :8; //Prescaler value.
unsigned int GT :8; //Guard time value.
unsigned int Reserved1 :16; //Reserved, forced by hardware to 0.
}bUSART_GTPR;
#define pbUSART1_GTPR ((bUSART_GTPR *)(&USART1_GTPR))
#define pbUSART2_GTPR ((bUSART_GTPR *)(&USART2_GTPR))
#define pbUSART3_GTPR ((bUSART_GTPR *)(&USART3_GTPR))
void Usart1Init(void);
unsigned char Usart1GetChar(void);
void Usart1PutChar(unsigned char Value);
void Usart1PutString(unsigned char *pString);
#endif
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