📄 int.s
字号:
mtcrf 0x80, r3 # restore CR0
mtspr MMU_RPA, r1 # set the pte
tlbld r0 # load the dtlb
rfi # return to executing program
#+
# Register usage:
# r0 is saved counter
# r1 is junk
# r2 is pointer to pteg
# r3 is current compare value
#-
cEq0SecHash:
andi. r1, r3, 0x0040 # see if we have done second hash.MOTOROLA Chapter 5. Memory Management 5-49
bne doDSI # if so, go to DSI exception
mfspr r2, MMU_SPR_HASH2 # get the second pointer
ori r3, r3, 0x0040 # change the compare value
addi r1, 0, 8 # load 8 for counter
addi r2, r2, -8 # pre dec for update on load
b ceq0 # try second hash
#+
# entry found and PTE(c-bit==0):
# (check protection before setting PTE(c-bit)
# Register usage:
# r0 is saved counter
# r1 is PTE entry
# r2 is pointer to pteg
# r3 is trashed
#-
cEq0ChkProt:
rlwinm. r3,r1,30,0,1 # test PP
bge- chk0 # if (PP==00 or PP==01) goto chk0:
andi. r3,r1,1 # test PP[0]
beq+ chk2 # return if PP[0]==0
b doDSIp # else DSIp
chk0:
mfspr r3,MMU_SRR1 # get old msr
andis. r3,r3,0x0008 # test the KEY bit (MMU_SRR0-bit 12)
beq chk2 # if (KEY==0) goto chk2:
b doDSIp # else DSIp
chk2:
ori r1, r1, 0x180 # set reference and change bit
sth r1, -2(r2) # update page table
b ceq2 # and back we go
#
#+
# entry Not Found: synthesize a DSI exception
# Entry:
# r0 is saved counter
# r1 is junk
# r2 is pointer to pteg
# r3 is current compare value
#
doDSI:
mfspr r3, MMU_SRR1 # get MMU_SRR1
rlwinm r1, r3, 9,6,6 # get MMU_SRR1<flag> to bit 6 for load/store, zero rest
addis r1, r1, 0x4000 # or in MMU_DSISR<1> = 1 to flag pte not found
b dsi1:
doDSIp:
mfspr r3, MMU_SRR1 # get MMU_SRR1
rlwinm r1, r3, 9,6,6 # get MMU_SRR1<flag> to bit 6 for load/store, zero rest
addis r1, r1, 0x0800 # or in MMU_DSISR<4> = 1 to flag prot violation
dsi1:
mtctr r0 # restore counter
andi. r2, r3, 0xffff # clear upper bits of MMU_SRR1
mtspr MMU_SRR1, r2 # set MMU_SRR1
mtspr MMU_DSISR, r1 # load the MMU_DSISR.mfspr r1, MMU_SPR_DMISS # get miss address
rlwinm. r2,r2,0,31,31 # test LE bit
bne dsi2: # if little endian then:
xori r1,r1,0x07 # de-mung the data address
dsi2:
mtspr MMU_DAR, r1 # put in MMU_DAR
mfmsr r0 # get msr
xoris r0, r0, 0x2 # flip the msr<tgpr> bit
mtcrf 0x80, r3 # restore CR0
mtmsr r0 # flip back to the native gprs
b DSI_Vector # branch to DSI exception
#
# /* End of NU_MMU_LITE conditional include for data TLB store misses */
#
.else
addi r1,r1,-8 # subtract 8 bytes for DIAB/DATA
stw r12,0(r1) # save r12
stwu r11,-4(r1) # save r11
stwu r10,-4(r1) # save r10
stwu r9,-4(r1) # save r9
mfspr r12,SRR0 # read the rfi PC value/SRR0
stwu r12,-4(r1) # save on the stack
li r11,18 # load vector number
ba INT_Shell
.endc
.skip 0x1300-(.-INT_Vectors) # Instruction address breakpoint
addi r1,r1,-8 # subtract 8 bytes for DIAB/DATA
stw r12,0(r1) # save r12
stwu r11,-4(r1) # save r11
stwu r10,-4(r1) # save r10
stwu r9,-4(r1) # save r9
mfspr r12,SRR0 # read the rfi PC value/SRR0
stwu r12,-4(r1) # save on the stack
li r11,19 # load vector number
ba INT_Shell
.skip 0x1400-(.-INT_Vectors) # System management interrupt
addi r1,r1,-8 # subtract 8 bytes for DIAB/DATA
stw r12,0(r1) # save r12
stwu r11,-4(r1) # save r11
stwu r10,-4(r1) # save r10
stwu r9,-4(r1) # save r9
mfspr r12,SRR0 # read the rfi PC value/SRR0
stwu r12,-4(r1) # save on the stack
li r11,20 # load vector number
ba INT_Shell
#/*************************************************************************/
#/* */
#/* FUNCTION */
#/* */
#/* INT_Initialize */
#/* */
#/* DESCRIPTION */
#/* */
#/* This function sets up the global system stack variable and */
#/* transfers control to the target independent initialization */
#/* function INC_Initialize. Responsibilities of this function */
#/* include the following: */
#/* */
#/* - Setup necessary processor/system control registers */
#/* - Initialize the vector table */
#/* - Setup the system stack pointers */
#/* - Setup the timer interrupt */
#/* - Calculate the timer HISR stack and priority */
#/* - Calculate the first available memory address */
#/* - Transfer control to INC_Initialize to initialize all of */
#/* the system components. */
#/* */
#/* CALLED BY */
#/* */
#/* __init_main ENTRY routine in crt0.s which*/
#/* is supplied by DIABDATA. */
#/* */
#/* CALLS */
#/* */
#/* INC_Initialize Common initialization */
#/* */
#/* INPUTS */
#/* */
#/* None */
#/* */
#/* OUTPUTS */
#/* */
#/* None */
#/* */
#/* HISTORY */
#/* */
#/* NAME DATE REMARKS */
#/* */
#/* Craig L. Meredith 12-08-1994 Created initial version 1.0 */
#/* */
#/*************************************************************************/
#VOID INT_Initialize(void)
#{
.text
.align 2
INT_Initialize:
#---------------------------------------------------------------------------
# /* Ensure r0 is 0. */
#---------------------------------------------------------------------------
addis r0,0,0x0000
#---------------------------------------------------------------------------
# /* Enable machine check exceptions and set RI bit */
#---------------------------------------------------------------------------
mfmsr r3
ori r3,r3,0x1002
mtmsr r3
#---------------------------------------------------------------------------
# /* Disable both Caches (Instruction and Data) and Superscalar
# execution as they interfere with JTAG operation. */
#---------------------------------------------------------------------------
mfspr r3,HID0 # Get HID0
lis r8,(H0_ICE | H0_DCE)@h # Create (H0_ICE | H0_DCE)
ori r8,r8,(H0_ICE | H0_DCE)@l # mask.
andc r3,r3,r8 # Mask out ICE and DCE bits
mtspr HID0,r3 # Store HID0
isync
sync
#---------------------------------------------------------------------------
# /* Disable address translation. Clear the Instruction and Data
# Address Translation bits, IR and DR, of the MSR. */
#---------------------------------------------------------------------------
mfmsr r3 # Read MSR
addis r4,0,0xffff # create mask for IR and DR bits
ori r4,r4,0xffcf
and r3,r3,r4 # clear IR and DR using mask
mtmsr r3 # Write MSR
isync # ensure all instructions completed
sync
# /*************** Begin board specific code ***************/
.if (BOOT_FROM_FLASH==1)
#---------------------------------------------------------------------------
# /* If running from FLASH, initialization code for the SandpointX3/
# and UnityX4 boards will need to be done at this point.
# Initialization will need to configure interrupt controllers, setup
# RAM and configure the processor. */
#---------------------------------------------------------------------------
bl KahluaInit
bl INT_Copy_FLASH_To_RAM
#---------------------------------------------------------------------------
# /* Move the vector base to RAM at 0x0 */
#---------------------------------------------------------------------------
# mfmsr r12 # get current MSR
# rlwinm r12,r12,0,26,24 # clear IP bit
# mtmsr r12 # write out new MSR
.endif
# /**************** End board specific code ****************/
#---------------------------------------------------------------------------
# /* Setup a minimal stack for use by Diab init code */
#---------------------------------------------------------------------------
addis r11,r0,__SP_INIT@ha # Initialize stack pointer r1 to
addi r1,r11,__SP_INIT@l # value in linker command file.
addis r13,r0,_SDA_BASE_@ha # Initialize r13 to sdata base
addi r13,r13,_SDA_BASE_@l # (provided by linker).
addis r2,r0,_SDA2_BASE_@ha # Initialize r2 to sdata2 base
addi r2,r2,_SDA2_BASE_@l # (provided by linker).
addi r0,r0,0 # Clear r0.
stwu r0,-64(r1) # Terminate stack.
#---------------------------------------------------------------------------
# /* Call Diab Data __init_main function to setup C environment
# and clear the BSS section. The __init_main function will branch
# to the main symbol when it is finished. */
#---------------------------------------------------------------------------
bl __init_main
main:
nucleus_main:
bl epic_Init
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -