📄 int_est.s
字号:
addi r5,r5,INT_UPMA_Table@l
addi r6,r5,256 # Get end address of UPMA table
lis r7,0x0000 # Load command: write,UPMA,MAD=0
INT_UPMA_Loop:
lwz r3,0(r5) # Get table entry
stw r3,MDR(r4) # Copy to MDR
stw r7,MCR(r4) # Issue command to MCR
addi r5,r5,4 # Point to next entry in table
addi r7,r7,1 # Increment MAD field of MCR command
cmp r5,r6 # Finished?
blt INT_UPMA_Loop # If not, keep looping
lis r3,0x0ca2 # DRAM at 0x00000000
ori r3,r3,0x0111
stw r3,MAMR(r4)
lis r3,0x0000
ori r3,r3,0x0081
stw r3,BR4(r4)
lis r3,0xffc0
ori r3,r3,0x0000
stw r3,OR4(r4)
#
# /* Clear the BSS area */
#
addis r3,r0,__BSS_START@ha
addi r3,r3,__BSS_START@l
addis r4,r0,__BSS_END@ha
addi r4,r4,__BSS_END@l
addi r5,r0,0
INT_BSS_Loop:
cmpl 0,r4,r3
beq INT_BSS_Loop_Done # eq
stw r5,0(r3)
addi r3,r3,4
b INT_BSS_Loop
INT_BSS_Loop_Done:
#
# /* Move vector table base address to 0 */
#
mfmsr r12 # get current MSR
rlwinm r12,r12,0,26,24 # clear IP bit
mtmsr r12 # write out new MSR
#
# /* Setup the vectors loaded flag to indicate to other routines in the
# system whether or not all of the default vectors have been loaded.
# If INT_Loaded_Flag is 1, all of the default vectors have been loaded.
# Otherwise, if INT_Loaded_Flag is 0, registering an LISR causes the
# default vector to be loaded.
#
addis r12,r0,INT_Loaded_Flag@ha # get upper 16 bits of address
li r11,1 # clear the r11 register
stw r11,INT_Loaded_Flag@l(r12) # store 1 to INT_Loaded_Flag
#
# /* Initialize the system stack pointers. This is done after the BSS is
# clear because the TCD_System_Stack pointer is a BSS variable!. */
#
addi r1,r4,4 # move to next available space
addi r1,r1,SYSTEM_SIZE # add in our system stack size
addi r4,r1,-8 # allocate space for the DIAB/DATA
# frame
addis r10,r0,TCT_System_Limit@ha # get upper 16 bits of address
stw r4,TCT_System_Limit@l(r10) # store stack limit size
#
# /* Save the current System stack to TCD_System_Stack. */
#
addis r10,r0,TCD_System_Stack@ha # get upper 16 bits and < 16 bits
stw r4,TCD_System_Stack@l(r10) # store the current stack
mr r14,r4 # save in preserved register
#
# /* Add the IRQ stack size to the current stack size for placement of
# the IRQ stack just after the TCD_System_Stack location. Store
# the IRQ stack address into the TMD_HISR_Stack_Ptr. */
#
addi r1,r1,4 # move to next available space
addi r1,r1,IRQ_STACK_SIZE # add IRQ stack size
addi r5,r1,-8 # allocate space for the DIAB/DATA
# frame
#
# TMD_HISR_Stack_Ptr = (VOID *) current stack address;
#
addis r10,r0,TMD_HISR_Stack_Ptr@ha # get upper 16 bits and < 16 bits
stw r5,TMD_HISR_Stack_Ptr@l(r10) # store the current IRQ stack
#
# /* Store the maximum size of the Timer HISR stack to TMD_HISR_Stack_Size. */
# TMD_HISR_Stack_Size = TIMER_SIZE;
#
li r9,TIMER_SIZE # load Timer HISR stack size
addis r10,r0,TMD_HISR_Stack_Size@ha # get upper 16 bits and < 16 bits
stw r9,TMD_HISR_Stack_Size@l(r10) # store the Timer HISR stack size
#
# /* Store the current Timer HISR priority to TMD_HISR_Priority */
# TMD_HISR_Priority = TIMER_PRIORITY;
#
li r8,TIMER_PRIORITY # get Timer HISR priority
addis r10,r0,TMD_HISR_Priority@ha # get upper 16 bits and < 16 bits
stw r8,TMD_HISR_Priority@l(r10) # store the Timer HISR priority
#
# /* Add in the Timer HISR stack size to the current system stack size.
# /* Note: This current stack size will now be passed to the INC_Initialize
# routine as the first available memory location for allocating
# system memory blocks. This is why we store it into r3. */
#
addi r1,r1,4 # move to next available
add r1,r1,r9
#
# /* Initialize the MMU */
#
bl MMU_Init
#
# /* Unlock, invalidate, and enable the caches */
#
lis r3,CACHE_UNLK_ALL
sync
mtspr DC_CST,r3 # unlock all data cache entries
mtspr IC_CST,r3 # unlock all instr cache entries
lis r3,CACHE_INV_ALL
sync
mtspr DC_CST,r3 # invalidate all data cache entries
mtspr IC_CST,r3 # invalidata all instr cache entries
lis r3,CACHE_ENABLE
sync
mtspr DC_CST,r3 # enable data cache
mtspr IC_CST,r3 # enable instruction cache
isync
#
# /* Load the DEC register with a value for creating an interrupt
# to the kernel.
#
li r11,DEC_LOAD # setup DEC for 10ms periodic
mtspr DEC,r11 # interrupt
#
# /* Call INC_Initialize with a pointer to the first available memory
# address after the compiler's global data. This memory may be used
# by the application, for memory pool allocations, partitions, etc. */
#
addi r1,r1,4 # move to next available space
mr r3,r1
mr r1,r14 # reset system stack to start
b INC_Initialize
#
#}
#
#/*************************************************************************/
#/* */
#/* FUNCTION */
#/* */
#/* INT_Vectors_Loaded */
#/* */
#/* DESCRIPTION */
#/* */
#/* This function returns the flag that indicates whether or not */
#/* all the default vectors have been loaded. If it is false, */
#/* each LISR register also loads the ISR shell into the actual */
#/* vector table. */
#/* */
#/* AUTHOR */
#/* */
#/* Barry Sellew, Accelerated Technology, Inc. */
#/* */
#/* CALLED BY */
#/* */
#/* TCC_Register_LISR Register LISR for vector */
#/* */
#/* CALLS */
#/* */
#/* None */
#/* */
#/* INPUTS */
#/* */
#/* None */
#/* */
#/* OUTPUTS */
#/* */
#/* None */
#/* */
#/* HISTORY */
#/* */
#/* NAME DATE REMARKS */
#/* */
#/* Barry Sellew 06-24-1996 Created initial version 1.0 */
#/* */
#/*************************************************************************/
#INT INT_Vectors_Loaded(VOID)
#{
.text
.align 2
.globl INT_Vectors_Loaded
INT_Vectors_Loaded:
#
# /* return the value in the INT_Loaded_Flag variable */
#
addis r3,r0,INT_Loaded_Flag@ha # get upper 16 bits < 16 bits
lwz r3,INT_Loaded_Flag@l(r3) # store value to r3 for return
#
# /* Return to caller */
#
blr
#
#}
#
#/*************************************************************************/
#/* */
#/* FUNCTION */
#/* */
#/* INT_Setup_Vector */
#/* */
#/* DESCRIPTION */
#/* */
#/* This function sets up the specified vector with the new vector */
#/* value. The previous vector value is returned to the caller. */
#/* */
#/* AUTHOR */
#/* */
#/* Barry Sellew, Accelerated Technology, Inc. */
#/* */
#/* CALLED BY */
#/* */
#/* Application */
#/* TCC_Register_LISR Register LISR for vector */
#/* */
#/* CALLS */
#/* */
#/* None */
#/* */
#/* INPUTS */
#/* */
#/* vector (argument in r3) Vector number to setup */
#/* new (argument in r4) Pointer to new assembly */
#/* language ISR */
#/* */
#/* OUTPUTS */
#/* */
#/* old vector contents (return in r3) */
#/* */
#/* HISTORY */
#/* */
#/* NAME DATE REMARKS */
#/* */
#/* Barry Sellew 06-24-1996 Created initial version 1.0 */
#/* */
#/*************************************************************************/
#VOID *INT_Setup_Vector(INT vector, VOID *new)
#{
#VOID *old_vector; /* Old interrupt vector */
#
.text
.align 2
.globl INT_Setup_Vector
INT_Setup_Vector:
#
# /* save some registers */
#
stmw r20,-48(r1)
#
# /* Pickup the old interrupt vector. */
#
rlwinm r11,r3,8,0,23 # vector * 0x100
lwz r3,0(r11) # r3 = old vector
#
# /* Setup the new interrupt vector. */
# INT_Vectors[vector][0] = new;
#
addis r12,r0,INT_Vectors@ha # load upper 16 bits, < 16 bits
addi r12,r12,INT_Vectors@l # add in lower 16 bits
add r12,r12,r11 # point to offset in INT_Vectors
lmw r20,0(r12) # load 12 words from Nucleus vects
stmw r20,0(r11) # write 12 words to vector table
#
# /* Restore used registers */
#
lmw r20,-48(r1)
#
# /* Return the old interrupt vector. */
# return(old_vector);
#
blr
#
#}
#
#/*************************************************************************/
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -