c3_4_1.c

dsp入门与实践一书的源代码

#define 	CE1_ADDRS 	0x01400000
#define 	INT_MEM 	0x80000000
#define 	CE1_CNTRL 	0x01800004
#include 	<emif.h>

void emif_config()
{
		unsigned int g_ctrl = GET_REG(EMIF_GCTRL);
		unsigned int ce0_ctrl = GET_REG(EMIF_CE0_CTRL);
		unsigned int ce1_ctrl = GET_REG(EMIF_CE1_CTRL);
		unsigned int ce2_ctrl = GET_REG(EMIF_CE2_CTRL);
		unsigned int ce3_ctrl = GET_REG(EMIF_CE3_CTRL);
		unsigned int sdram_ctrl = GET_REG(EMIF_SDRAM_CTRL);
		unsigned int sdram_ref = GET_REG(EMIF_SDRAM_REF); 	
		LOAD_FIELD(&ce0_ctrl , MTYPE_32ASYNC, MTYPE , MTYPE_SZ );
		LOAD_FIELD(&ce0_ctrl , 1 , READ_SETUP , READ_SETUP_SZ );
		LOAD_FIELD(&ce0_ctrl , 17 , READ_STROBE , READ_STROBE_SZ );
		LOAD_FIELD(&ce0_ctrl , 3 , READ_HOLD , READ_HOLD_SZ );
		LOAD_FIELD(&ce0_ctrl , 2 , WRITE_SETUP , WRITE_SETUP_SZ );
		LOAD_FIELD(&ce0_ctrl , 11 , WRITE_STROBE, WRITE_STROBE_SZ);
		LOAD_FIELD(&ce0_ctrl , 3 , WRITE_HOLD , WRITE_HOLD_SZ );
													
		emif_init(g_ctrl, ce0_ctrl, ce1_ctrl, ce2_ctrl, ce3_ctrl,sdram_ctrl, sdram_ref);
		}