nand.c

DMA-2442开发板bootloader

/*	 NF_RDDATA();  // read 4~7
	 Secc=NF_RDDATA();
	 rNFSECCD=((Secc&0xff00)<<8)|(Secc&0xff);
	 NF8_Spare_Data[8]=Secc&0xff;
	 NF8_Spare_Data[9]=(Secc&0xff00)>>8;
	 NF8_Spare_Data[10]=(Secc&0xff0000)>>16;
	 NF8_Spare_Data[11]=(Secc&0xff000000)>>24;
	 */
	 

	NF_nFCE_H();

	//NFChipDs();
	 if ((rNFESTAT0&0x3) == 0x0){
	       //Uart_Printf("ECC OK!\n");
		return OK;
	 }
	 else {
		Uart_Printf("ECC FAIL!\n");
	       return FAIL;
	 }
#endif 
	//NF_nFCE_H();

	NFChipDs();
	return OK;
#endif
}

#endif


#if 1
static int NF_WritePage(U32 block,U32 page,U8 *buffer)
{
    int i;
	U32 blockPage, Mecc, Secc;
	U8 *bufPt=buffer;

	rGPHCON = 0x1afaaa;
	rGPHDAT = 0x7ff;

	NFConDone_1G08=0;
      // rNFCONT|=(1<<9);
      // rNFCONT|=(1<<10);
       pISR_NFCON= (unsigned)NFCon_Int_1G08;
       rSRCPND=BIT_NFCON;
      // rINTMSK=~(BIT_NFCON);
	  
	NF_RSTECC();    // Initialize ECC
       NF_MECC_UnLock();
	blockPage=(block<<6)+page;


		NF_nFCE_L();
	
	rNFCMD=0x80;   // Write 1st command
	rNFADDR=0; 	// Column (A[7:0]) = 0
	rNFADDR=0; 	// A[11:8]
	rNFADDR=((blockPage)&0xff);	// A[19:12]
	rNFADDR=((blockPage>>8)&0xff);	// A[27:20]
	
	
     
	for(i=0;i<2048;i++) {
		NF_WRDATA8(*bufPt++);	// Write one page to NFM from buffer
    }

/*
      NF_MECC_Lock();
// Get ECC data.
	// Spare data for 8bit
	// byte  0   1    2    3    4   5
	// ecc  [0]  [1]  [2]  [3]  x   [Bad marking]
	Mecc = rNFMECC0;
	se8Buf[0]=(U8)(Mecc&0xff);
	se8Buf[1]=(U8)((Mecc>>8) & 0xff);
	se8Buf[2]=(U8)((Mecc>>16) & 0xff);
	se8Buf[3]=(U8)((Mecc>>24) & 0xff);
	se8Buf[5]=0xffff;		// Marking good block

	//Write extra data(ECC, bad marking)
	for(i=0;i<16;i++) {
		NF_WRDATA8(se8Buf[i]);	// Write spare array(ECC and Mark)
		NF8_Spare_Data[i]=se8Buf[i];
    }  

 	NF_CLEAR_RB();
	NF_CMD(0x10);	 // Write 2nd command
	NF_DETECT_RB();

	NF_CMD(0x70);   // Read status command   
    
	for(i=0;i<3;i++);  //twhr=60ns
     
    if (NF_RDDATA()&0x1) {// Page write error
    	
		Uart_Printf("[PROGRAM_ERROR:block#=%d]\n",block);
		NF8_MarkBadBlock(block);
		 NF_nFCE_H();
		return FAIL;
    } else {
    	   NF_nFCE_H();
	  return OK;
	   
	}
*/

       NF_MECC_Lock();
	// Get ECC data.
	// Spare data for 8bit
	// byte  0                  1    2     3     4          5               6      7            8         9
	// ecc  [Bad marking] [0]  [1]  [2]  [3]    x                       SECC0  SECC1
	Mecc = rNFMECC0;

	se8Buf[0]=0xff;
	se8Buf[1]=(U8)(Mecc&0xff);
	se8Buf[2]=(U8)((Mecc>>8) & 0xff);
	se8Buf[3]=(U8)((Mecc>>16) & 0xff);
	se8Buf[4]=(U8)((Mecc>>24) & 0xff);
			// Marking good block
#if 1
//	NF_SECC_UnLock();
	//Write extra data(ECC, bad marking)
	for(i=0;i<5;i++) {
		NF_WRDATA8(se8Buf[i]);	// Write spare array(Main ECC)
		NF1G08_Spare_Data[i]=se8Buf[i];
    	}  
/*      NF_SECC_Lock(); 
	Secc=rNFSECC; 
	se8Buf[8]=(U8)(Secc&0xff);
	se8Buf[9]=(U8)((Secc>>8) & 0xff);
	*/
	for(i=5;i<64;i++) {
		NF_WRDATA8(se8Buf[i]);  // Write spare array(Spare ECC and Mark)
		NF1G08_Spare_Data[i]=se8Buf[i];
	}  
#endif
 	NF_CLEAR_RB();
	rNFCMD=(0x10);	 // Write 2nd command
	NF_DETECT_RB();
//	while(NFConDone_1G08==0);
	 rNFCONT&=~(1<<9);
	 rNFCONT&=~(1<<10); // Disable Illegal Access Interrupt
	 if(rNFSTAT&0x8) return FAIL;

	rNFCMD=(0x70);   // Read status command   
    
	for(i=0;i<3;i++);  //twhr=60ns
    
       if (NF_RDDATA()&0x1) {// Page write error
    	       
		NF_nFCE_H();
	
	
		Uart_Printf("[PROGRAM_ERROR:block#=%d]\n",block);
		//NF1G08_MarkBadBlock(block);
		return FAIL;
       } else {
    	     
			NF_nFCE_H();
	
	      return OK;
	}

}
#else

static int NF_WritePage(U32 block,U32 page,U8 *buffer)
{

#if 0
	int i;
	U32 blockPage;
	U8 *bufPt=buffer;
	U32 mecc;
	int stat;
	blockPage =block * cpages_in_block + page;

	//NF_RSTECC();
	//NF_MECC_UnLock();

	//NF_nFCE_L();
	//NF_CLEAR_RB();
	NFChipEn();

	if (cpage2Kis) {
		rNFCMD = NAND_CMD_SEQIN;
		rNFADDR= 0;
		rNFADDR= 0;
		rNFADDR= blockPage & 0xff;
		rNFADDR=(blockPage>>8) & 0xff;
	}
	else {
		rNFCMD = NAND_CMD_READ0;
		rNFCMD = NAND_CMD_SEQIN;
		rNFADDR= 0;
		rNFADDR= blockPage & 0xff;
		rNFADDR= (blockPage>>8) & 0xff;
		rNFADDR=((blockPage>>16)&0xff);
	}
	InitEcc();
	NF_MECC_UnLock();
	

	for(i=0; i < cpage_size; i++) {
		NF_WRDATA8(buffer[i]);
	}
	// Calculate ECC
	NF_MECC_Lock();

	/* 
         * 2442 uses 28 bit ECC for both 512 and  2048 sized pages
         */

	mecc = rNFMECC0;
	if(cpage2Kis)
	{
	se8Buf[0]=0xff;
	se8Buf[1]=(U8)(mecc&0xff);
	se8Buf[2]=(U8)((mecc>>8) & 0xff);
	se8Buf[3]=(U8)((mecc>>16) & 0xff);
	se8Buf[4]=(U8)((mecc>>24) & 0xff);
	}
	else
	{
	se8Buf[0]=(U8)(mecc&0xff);
	se8Buf[1]=(U8)((mecc>>8) & 0xff);
	se8Buf[2]=(U8)((mecc>>16) & 0xff);
	se8Buf[3]=(U8)((mecc>>24) & 0xff);
	se8Buf[5]=0xff;

	}

	for(i=0;i<coob_size;i++) {
		NF_WRDATA8(se8Buf[i]);	// Write spare array(Main ECC)
		NF1G08_Spare_Data[i]=se8Buf[i];
    	}  
	//NF_CLEAR_RB();
	rNFCMD = NAND_CMD_PAGEPROG;
	stat = WaitNFBusy();
	NFChipDs();
#if 0
	for(i=0; i<10 ;i++);
	NF_DETECT_RB();
	rNFCMD = NAND_CMD_STATUS;
	for(i=0;i<3;i++); 
	if (NF_RDDATA() & 0x1) {// Page write error
		NF_nFCE_H();
		printf("[PROGRAM_ERROR:block#=%d]\n",block);
		//NF_MarkBadBlock(block);
		return FAIL;
	} else {
		//NF_nFCE_H();
		NFChipDs();
		return OK;
	}
#endif
	if(stat)
		printf("Write nand flash 0x%x fail\n", blockPage);
	return OK;
#endif
	int i;
	U32 blockPage;
	U8 *bufPt=buffer;
	U32 mecc;
	int stat;
	blockPage =block * cpages_in_block + page;
	rGPHCON = 0x1afaaa;
	rGPHDAT = 0x7ff;

	NF_RSTECC();
	NF_MECC_UnLock();

	NF_nFCE_L();


	if (cpage2Kis) {
		rNFCMD = NAND_CMD_SEQIN;
		rNFADDR= 0;
		rNFADDR= 0;
		rNFADDR= blockPage & 0xff;
		rNFADDR=(blockPage>>8) & 0xff;
	}
	else {
		rNFCMD = NAND_CMD_READ0;
		rNFCMD = NAND_CMD_SEQIN;
		rNFADDR= 0;
		rNFADDR= blockPage & 0xff;
		rNFADDR= (blockPage>>8) & 0xff;
		rNFADDR=((blockPage>>16)&0xff);
	}
	//InitEcc();
	//NF_MECC_UnLock();
	

	for(i=0; i < cpage_size; i++) {
		NF_WRDATA8(buffer[i]);
	}
	// Calculate ECC
	NF_MECC_Lock();

	/* 
         * 2442 uses 28 bit ECC for both 512 and  2048 sized pages
         */

	mecc = rNFMECC0;
	if(cpage2Kis)
	{
	se8Buf[0]=0xff;
	se8Buf[1]=(U8)(mecc&0xff);
	se8Buf[2]=(U8)((mecc>>8) & 0xff);
	se8Buf[3]=(U8)((mecc>>16) & 0xff);
	se8Buf[4]=(U8)((mecc>>24) & 0xff);
	}
	else
	{
	se8Buf[0]=(U8)(mecc&0xff);
	se8Buf[1]=(U8)((mecc>>8) & 0xff);
	se8Buf[2]=(U8)((mecc>>16) & 0xff);
	se8Buf[3]=(U8)((mecc>>24) & 0xff);
	se8Buf[5]=0xff;

	}

	for(i=0;i<coob_size;i++) {
		NF_WRDATA8(se8Buf[i]);	// Write spare array(Main ECC)
		NF1G08_Spare_Data[i]=se8Buf[i];
    	}  
	//NF_CLEAR_RB();
	
	//stat = WaitNFBusy();
	//NFChipDs();
#if 0
	for(i=0; i<10 ;i++);
	NF_DETECT_RB();
	rNFCMD = NAND_CMD_STATUS;
	for(i=0;i<3;i++); 
	if (NF_RDDATA() & 0x1) {// Page write error
		NF_nFCE_H();
		printf("[PROGRAM_ERROR:block#=%d]\n",block);
		//NF_MarkBadBlock(block);
		return FAIL;
	} else {
		//NF_nFCE_H();
		NFChipDs();
		return OK;
	}
#endif
	NF_CLEAR_RB();
	rNFCMD = NAND_CMD_PAGEPROG;
	NF_DETECT_RB();
//	while(NFConDone_1G08==0);
	 rNFCONT&=~(1<<9);
	 rNFCONT&=~(1<<10); // Disable Illegal Access Interrupt
	 if(rNFSTAT&0x8) return FAIL;

	rNFCMD = NAND_CMD_STATUS;
    
	for(i=0;i<3;i++);  //twhr=60ns
    
       if (NF_RDDATA()&0x1) {// Page write error
    	       #if Nand_FCE 
 			EXT_NF_nFCE_H();
		#else
			NF_nFCE_H();
		#endif
	
		Uart_Printf("[PROGRAM_ERROR:block#=%d]\n",block);
		//NF1G08_MarkBadBlock(block);
		return FAIL;
       } else {
    	      #if Nand_FCE 
 			EXT_NF_nFCE_H();
		#else
			NF_nFCE_H();
		#endif
	      return OK;
	}
	//if(stat)
	//	printf("Write nand flash 0x%x fail\n", blockPage);
	return OK;


}

#endif

static U8 NF_CheckId(void)
{
        int i;
        U8 maf_id,dev_id;

       NF_nFCE_L();
     //	NFChipEn();	

       rNFCMD = NAND_CMD_READID;
        rNFADDR = 0x0;

        for(i=0;i<10;i++);
	//while(NFIsBusy());	

        maf_id=NF_RDDATA8();
        dev_id=NF_RDDATA8();
	//printf("Maker:%x, Device:%x\n", maf_id, dev_id);
       NF_nFCE_H();
	//NFChipDs();		
        return dev_id;
}


void NF_Reset(void)
{
	int i;

	NF_nFCE_L();
	NF_CLEAR_RB();
	
 	rNFCMD = NAND_CMD_RESET;

	for(i=0;i<10;i++);
	NF_DETECT_RB();
	NF_nFCE_H();
}
#if 1
static int NF_EraseBlock(U32 block)
{
    U32 blockPage=(block<<6);
    int i;

    NFConDone_1G08=0;
    //rNFCONT|=(1<<9);
    //rNFCONT|=(1<<10);
    pISR_NFCON= (unsigned)NFCon_Int_1G08;
    rSRCPND=BIT_NFCON;
    //rINTMSK=~(BIT_NFCON);
	


		NF_nFCE_L();

    
	rNFCMD=(0x60);   // Erase one block 1st command, Block Addr:A9-A25
	// Address 2-cycle
	rNFADDR=(blockPage&0xff);	    // Page number=0
	rNFADDR=((blockPage>>8)&0xff);   
	


	NF_CLEAR_RB();
	rNFCMD=(0xd0);	// Erase one blcok 2nd command
	NF_DETECT_RB();
//       while(NFConDone_1G08==0);
//	 rNFCONT&=~(1<<9);
//	 rNFCONT&=~(1<<10); // Disable Illegal Access Interrupt
	 if(rNFSTAT&0x8) return FAIL;

	rNFCMD=(0x70);   // Read status command

      if (NF_RDDATA()&0x1) // Erase error
      {	

	
		NF_nFCE_H();

	Uart_Printf("[ERASE_ERROR:block#=%d]\n",block);
//	NF8_MarkBadBlock(block);
	return FAIL;
       }
       else 
       {

	
		NF_nFCE_H();

	
       return OK;
       }
}
#else
/*
 * NF_EraseBlock
 */
static int NF_EraseBlock(U32 block)
{
	U32 blockPage = block * cpages_in_block;
	int i;
	int stat;
	//NF_SOFT_UnLock();

//	NF_nFCE_L();
	//NF_CLEAR_RB();
	NFChipEn();	

	rNFCMD = NAND_CMD_ERASE1;
	if (cpage2Kis) {
		//NFADDR = 0x0;
	//	NFADDR = 0x0;
		rNFADDR = blockPage & 0xff;
		rNFADDR = (blockPage>>8) & 0xff;
	}
	else {
		rNFADDR = blockPage&0xff;
		rNFADDR = (blockPage>>8)&0xff;
		rNFADDR = (blockPage>>16)&0xff;
	}