📄 k0r_sfr_set.c
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/***************************************************************************************************************
;
; NNNNNN NN EEEEEEEEEEEEEEEEEE CCCCCCCCCCCCCCC
; NNNNNNNN NN EEEEEE CCCCCC
; NNNNNNNNNN NN EEEEEE CCCCCC
; NN NNNNNNNN NN EEEEEEEEEEEEEEEEE CCCCCC
; NN NNNNNNNN NN EEEEEE CCCCCC
; NN NNNNNNNNNN EEEEEE CCCCCC
; NN NNNNNN EEEEEEEEEEEEEEEE CCCCCCCCCCCCCCC
;
; NEC Electronics 78K0R/Kx3 Series
;丂丂
;亂License Agreement亃
;. This sample program is subject to change without notice.
;
;. NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual
; property rights of third parties by or arising from the use of this sample program. No license, express,
; implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of
; NEC Electronics or others.
;
;. Descriptions of commands, program, and other related information in this sample program are provided for
; illustrative purposes in semiconductor product operation and application examples. The incorporation of
; this sample program in the design of a customer's equipment shall be done under the full responsibility of
; the customer. NEC Electronics assumes no responsibility for any losses incurred by customers or third parties
; arising from the use of this sample program.
;
;丂Please use this sample program under the agreement listed above.
;
;***************************************************************************************************************
; 78K0R/Kx3 Series sample program
;***************************************************************************************************************
; IIC0 Communication (Master Operation) (SFR Setting)
;***************************************************************************************************************
; [History]
; 2007.07 new
;***************************************************************************************************************/
/***************************************************************************
* Title: SFR setting
*---------------------------------------------------------------------------
* Rev.: 0.00
*---------------------------------------------------------------------------
* Note:
* fCLK = 20MHz
* operation mode: fast mode
* number of data to send: 1 byte
* number of data to send: 2 byte
* data to send: A9H
* slave address: A0H
* communication format:
* ST + ADR/W + DT + ST + ADR/R + DT + DT + SP
* ST: start condition
* SP: stop condition
* ADR/W: slave address + _W
* ADR/R: slave address + R
* DT: data
* use INTIIC0 (end of IIC0 communication)
*
***************************************************************************/
#pragma sfr /* definition for using SFR */
#pragma NOP /* definition for using NOP */
void IIC_SMMIN(void);
void IIC_SMMST(void);
void IIC_SMMSP(void);
/***************************************************************************
* data definition
***************************************************************************/
unsigned char PCTXCT; /* counter of sending data */
unsigned char PCRXCT; /* 庴counter of receiving data */
unsigned char PCRXDT; /* reception data buffer (1 byte) */
unsigned char PCRXBF[20]; /* reception data storage */
unsigned char PCTXSS; /* status flag
0: initial state
1: data sending
2: data receiving */
unsigned char PCADR; /* address setting (slave address + R/_W) */
#define D_IIC_SLV_ADR_W 0x0A0 /* slave address + W(0) */
#define D_IIC_SLV_ADR_R (0x0A0+0x1) /* slave address + R(1) */
#define D_IIC_SND_SIZE 0x1 /* number of data to send: 1 byte */
#define D_IIC_RCV_SIZE 0x2 /* number of data to receive: 2 bytes */
#define D_IIC_SND_DATA 0x0A9 /* data to send */
/***************************************************************************
* Title: IIC0 Communication (Master Operation)
* initial setting
****************************************************************************
* Module: void IIC_SMMIN(void)
* Arg:
* Ret:
***************************************************************************/
void IIC_SMMIN(void)
{
IIC0EN = 1; /* supplies input clock */
/**************************************************
transfer clock setting */
IICX0 = 0x00; /* CLX0 = 0: no expansion */
IICCL0 = 0b00001010; /* CLD0=0: SCL0 pin was detected at low level
DAD0=0: SDA0 pin was detected at low level
SMC0=1: operates in fast mode
DFC0=0: digital filter off
CL01=1, CL00=0: transfer clock = fCLK/96 */
/**************************************************
slave address setting (sets a local address when used as a master device) */
SVA0 = 0x00;
/**************************************************
sets start condition */
IICF0 = 0x00; /* STCF=0: clear STT0 (start condition) flag
IICBSY=0: clear IICBSY (I2C bus status) flag
STCEN=0: after operation is enabled (IICE0=1), enable generation of a start condition upon detection of s stop condition
IICRSV=0: enable communication reservation */
/**************************************************
IIC0 mode setting */
IICC0 = 0b00011100; /* IICE0=0: stop I2C operation
LREL0=0: exit from communication: normal operation
WREL0=0: do not cancel wait
SPIE0=1: enable generation of interrupt request when stop condition is detected
WTIM0=1: interrupt request is generated at the ninth clock's falling edge
ACKE0=1: enable acknowledge
STT0=0: do not generate a start condition
SPT0=0: stop condition is not generated */
IICE0 = 1; /* enable operation */
/**************************************************
port setting (after IICE0 = 1) */
P6 = 0b00000000; /* P61/SDA0 = low level
P60/SCL0 = low level */
PM6.0 = 0; /* SCL0: output mode */
PM6.1 = 0; /* SDA0: output mode */
IICIF0 = 0; /* clear interrupt request flag (INTIIC0) */
if(STCEN == 1){ /* initial start enable trigger ? */
return; /* YES... */
}
/**************************************************
prepares for starting communication */
SPT0 = 1; /* generates a stop condition */
while(IICIF0 == 0){ /* INTIIC0 occurs? */
NOP();
}
IICIF0 = 0;
}
/***************************************************************************
* Title: IIC0 Communication (Master Operation)
* communication processing
****************************************************************************
* Module: void IIC_SMMST(void)
* Arg:
* Ret:
***************************************************************************/
void IIC_SMMST(void)
{
PCTXCT = 0; /* clear counter of sending data */
PCRXCT = 0; /* clear counter of receiving data */
PCTXSS = 1; /* set status flag to 1 (data sending) */
while(1){
/**************************************************
set slave address and transfer direction */
if(PCTXSS == 1){ /* check status flag -> data sending? */
PCADR = D_IIC_SLV_ADR_W; /* slave address + W(0) */
}
else{
PCADR = D_IIC_SLV_ADR_R; /* slave address + R(1) */
}
STT0 = 1; /* generates start condition */
IIC0 = PCADR; /* send slave address and direction */
while(IICIF0 == 0){ /* INTIIC0 occurs? */
NOP();
}
IICIF0 = 0;
if(ACKD0 == 0){ /* ACK detected? */
goto JIC_SMMS10;
}
/**************************************************
detection of transmit/ receive status */
if(TRC0 == 1){ /* receive status? YES */
/**************************************************
transmit status */
do{
IIC0 = D_IIC_SND_DATA; /* send data */
while(IICIF0 == 0){ /* INTIIC0 occurs? data sent? */
NOP();
}
IICIF0 = 0;
if(ACKD0 == 0){ /* ACK detected? NO */
goto JIC_SMMS10; /* YES */
}
PCTXCT++; /* counter of sending data increment */
/**************************************************
check if transmission ends? */
} while(PCTXCT != D_IIC_SND_SIZE); /* transmission ends? */
PCTXSS = 2; /* set status flag to 02H -> data receiving */
}
else{
/**************************************************
receive status */
ACKE0 = 1; /* enable acknowledge */
WTIM0 = 0; /* interrupt request is generated at the eighth clock's falling edge */
do{
WREL0 = 1; /* cancel wait */
while(IICIF0 == 0){ /* INTIIC0 occurs? data received? */
NOP();
}
IICIF0 = 0;
PCRXDT = IIC0; /* read receiving data */
if(PCRXCT == 20-1){ /* receiving data area full? */
PCRXCT = 0;
}
PCRXBF[PCRXCT] = PCRXDT; /* store receiving data */
PCRXCT++; /* counter of receiving data increment */
/**************************************************
check if receiving ends? */
}while(PCRXCT != D_IIC_RCV_SIZE); /* receiving ends? */
ACKE0 = 0; /* disable acknowledge */
WTIM0 = 1; /* interrupt request is generated at the ninth clock's falling edge */
WREL0 = 1; /* cancel wait */
while(IICIF0 == 0){ /* INTIIC0 occurs? */
NOP();
}
IICIF0 = 0;
break; /* receiving ends */
}
}
/**************************************************
restart */
/*
Please add your program for restarting here. */
JIC_SMMS10:
NOP();
NOP();
NOP();
IIC_SMMSP(); /* stops communication */
}
/***************************************************************************
* Title: IIC0 Communication (Master Operation)
* stops communication
****************************************************************************
* Module: void IIC_SMMSP(void)
* Arg:
* Ret:
***************************************************************************/
void IIC_SMMSP(void)
{
SPT0 = 1; /* generates stop condition */
}
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