dma.h

CHP 2 - Real-Time Digital Signal Processing: Implementations and Applications, Second Edition by Sen

// 
//  Project: Experiment 2.10.8 Use DMA - Chapter 2 
//  File name: dma.h   
//
//  Description: This is the C header file for DMA experiment 
//
//  For the book "Real Time Digital Signal Processing: 
//                Implementation and Application, 2nd Ed"
//                By Sen M. Kuo, Bob H. Lee, and Wenshun Tian
//                Publisher: John Wiley and Sons, Ltd
//
//  Tools used: CCS v.2.12.07
//              TMS320VC5510 DSK Rev-C
//

// DMA register default values
#define DMACSDP_DEFAULT_VAL   0x0000
#define DMACCR_DEFAULT_VAL    0x0000
#define DMACICR_DEFAULT_VAL   0x0003
#define DMACSR_DEFAULT_VAL    0x0000

// DMA register initialization values
#define DMACCR_INIT_VAL       0x5060
        // DSTAMODE [15:14]   01  DST address-post-auto increment 
        // SRCAMODE [13:12]   01  SRC address-post-auto increment 
        // ENDPROG  [11]       0  No copy allowed
        // REPEAT   [9]        0  Repeat only if END PROG = 1
        // AUTOINIT [8]        0  Auto-initialization is disabled
        // EN       [7]        0  DMA is off
        // PRIO     [6]        1  DMA channel in high priority
        // FS       [5]        1  DMA channel frame synchronization
        // SYNC     [4:0] 000000  No DMA sync event 

#define DMACICR_INIT_VAL      0x0008
        // BLOCK IE [5]       0   Whole block interrupt is disabled
        // LAST IE  [4]       0   Last frame interrupt is disabled
        // FRAME IE [3]       1   Whole frame interrupt is disabled
        // HALF IE  [2]       0   Half frame interrupt is disabled
        // DROP IE  [1]       0   Sync drop interrupt is disabled
        // TIMEOUTIE[0]       0   Time out interrupt is disabled

#define DMACSR_INIT_VAL       0x0000
        // SYNC     [6]       0   Sync even status is cleared
        // BLOCK IE [5]       0   Whole block status is cleared
        // LAST IE  [4]       0   Last frame status is cleared
        // FRAME IE [3]       0   Whole frame status is cleared
        // HALF IE  [2]       0   Half frame status is cleared
        // DROP IE  [1]       0   Sync drop status is cleared
        // TIMEOUTIE[0]       0   Time out status is cleared

#define DMACSDP_INIT_VAL      0x0405
        // DSTBEN   [15:14]   00  Bursting is disabled for transfer
        // DSTPACK  [13]       0  Packing is disabled for transfer
        // DST      [12:9]  0010  DST is SDRAM
        // SRCBEN   [8:7]     00  Bursting is disabled for transfer
        // SRCPACK  [6]        0  Packing is disabled for transfer
        // SRC      [5:2]   0001  SRC is DARAM
        // DATATYPE [1:0]     01  16-bit data to be transferred

#define DMACFN_INIT_VAL       0x0001  // Default to 1 frame
#define DMACEN_INIT_VAL       0x0080  // Default 128 elements/frame  
#define DMACSEI_INIT_VAL      0x0000  // SRC element index is set to 0
#define DMACSFI_INIT_VAL      0x0000  // SRC frame index is set to 0
#define DMACDEI_INIT_VAL      0x0000  // DST element index is set to 0
#define DMACDFI_INIT_VAL      0x0000  // DST frame index is set to 0

#define DMA_REGS       16   // 16 registers for each DMA channel

// DMA register addresses
#define DMACH0_BASE  0x0C00
#define DMA_CSDP    (ioport volatile unsigned short*)(DMACH0_BASE+0x0)
#define DMA_CCR     (ioport volatile unsigned short*)(DMACH0_BASE+0x1)
#define DMA_CICR    (ioport volatile unsigned short*)(DMACH0_BASE+0x2)
#define DMA_CSR     (ioport volatile unsigned short*)(DMACH0_BASE+0x3)
#define DMA_CSSA_L  (ioport volatile unsigned short*)(DMACH0_BASE+0x4)
#define DMA_CSSA_U  (ioport volatile unsigned short*)(DMACH0_BASE+0x5)
#define DMA_CDSA_L  (ioport volatile unsigned short*)(DMACH0_BASE+0x6)
#define DMA_CDSA_U  (ioport volatile unsigned short*)(DMACH0_BASE+0x7)
#define DMA_CEN     (ioport volatile unsigned short*)(DMACH0_BASE+0x8)
#define DMA_CFN     (ioport volatile unsigned short*)(DMACH0_BASE+0x9)
#define DMA_CFI     (ioport volatile unsigned short*)(DMACH0_BASE+0xA)
#define DMA_CEI     (ioport volatile unsigned short*)(DMACH0_BASE+0xB)
#define DMA_CSAC    (ioport volatile unsigned short*)(DMACH0_BASE+0xC)
#define DMA_CDAC    (ioport volatile unsigned short*)(DMACH0_BASE+0xD)
#define DMA_CDEI    (ioport volatile unsigned short*)(DMACH0_BASE+0xE)
#define DMA_CDFI    (ioport volatile unsigned short*)(DMACH0_BASE+0xF)

// Global functions
extern void  dmaInit(short dmaNum, short *initPtr);
extern void  dmaEnable(short dmaNum);
extern short dmaFrameStat(short dmaNum);
extern void  dmaReset(short dmaNum);