mcbsp1init.c

CHP 2 - Real-Time Digital Signal Processing: Implementations and Applications, Second Edition by Sen

// 
//  Project: Experiment 2.10.6 Configure and Use McBSP- Chapter 2 
//  File name: mcbsp1Init.c   
//  Function(s): mcbsp1Init()        
//
//  Description: This function initialize the C5510 DSK McBSP1 registers
//
//  For the book "Real Time Digital Signal Processing: 
//                Implementation and Application, 2nd Ed"
//                By Sen M. Kuo, Bob H. Lee, and Wenshun Tian
//                Publisher: John Wiley and Sons, Ltd
//
//  Tools used: CCS v.2.12.07
//              TMS320VC5510 DSK Rev-C
//

#include "mcbsp.h"

#pragma CODE_SECTION(mcbsp1Init,    ".text:example:mcbsp1Init");

void mcbsp1Init(void)
{
  volatile short i;
  ioport volatile unsigned short*p;      
        
  mcbspReset(1);            // Set McBSP1 to default values first             
    
  p = (ioport volatile unsigned short*)(McBSP_BASE+McBSP1_OFFSET);           

  *(p+SPCR1) |= CLKSTP_BIT;  // SPCR1: Clock stop without delay 

  *(p+XCR1)  |= XWDLEN1_BIT; // XCR1: Select 16-bit data
 
  *(p+SRGR2) |= FPER_BIT     // SRGR2: Default 19 cycles
             |  CLKSM_BIT;   //        Use CPU clock

  *(p+SRGR1) |= CLKGDV_BIT;  // SRGR1: CLKG divided-down value

  *(p+PCR)   |= RIOEN_BIT    // PCR: Receive I/O enable
             |  FSRM_BIT     //      Transmit frame sync mode set
             |  CLKXM_BIT    //      Clock is master mode for SPI
             |  FSRP_BIT     //      Transmit frame sync active low
             |  CLKXP_BIT;   //      Transmit clock at falling edge of CLKR
            
  *(p+SPCR2) |= SOFT_BIT     // SPCR2: Set SOFT bit
             |  GRST_BIT     //        Enable sample rate generator
             |  FRST_BIT;    //        Enable frame sync

  for (i=0; i<200; i++);     // Wait until it stabilized

  *(p+SPCR2) |= XRST_BIT;    // SPCR2: Enable the McBSP1 transmitter
}