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>ARM/ARM7 Atmel JTST Evaluation Board (AT572D740-DK1)</TITLE
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><H1
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><A
NAME="AT91JTST"
>ARM/ARM7 Atmel JTST Evaluation Board (AT572D740-DK1)</A
></H1
><DIV
CLASS="SECT2"
><H2
CLASS="SECT2"
><A
NAME="AEN3741"
>Overview</A
></H2
><P
>&#13;RedBoot support is available for the JTST board. 
By default this board is shipped with 256Kbytes of
external SRAM. To minimize the amount of RAM used by RedBoot, only very basic
flash management is provided, comprising of just the <B
CLASS="COMMAND"
>fis
erase</B
> and <B
CLASS="COMMAND"
>fis write</B
> commands.</P
><P
>RedBoot supports two serial ports.
The default serial port settings for RedBoot are 115200,8,N,1. </P
><P
>The following RedBoot configurations are supported:

      <DIV
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><P
></P
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></A
><TABLE
BORDER="1"
FRAME="border"
RULES="all"
CLASS="CALSTABLE"
><COL><COL><COL><COL><THEAD
><TR
><TH
>Configuration</TH
><TH
>Mode</TH
><TH
>Description</TH
><TH
>File</TH
></TR
></THEAD
><TBODY
><TR
><TD
>ROM</TD
><TD
>[ROM]</TD
><TD
>RedBoot running from the board's flash boot
	      sector.</TD
><TD
>redboot_ROM.ecm</TD
></TR
><TR
><TD
>RAM</TD
><TD
>[RAM]</TD
><TD
>RedBoot running from RAM with RedBoot in the
	      flash boot sector.</TD
><TD
>redboot_RAM.ecm</TD
></TR
></TBODY
></TABLE
><P
></P
></DIV
></P
></DIV
><DIV
CLASS="SECT2"
><H2
CLASS="SECT2"
><A
NAME="AEN3773"
>Installing a RedBoot image on the JTST</A
></H2
><P
>This development board comes with RedBoot installed on flash. To
install a new version of RedBoot or another binary image in flash you
must start a GDB session setting a remote target and load and run the
<B
CLASS="COMMAND"
>jtstflashd.elf</B
> diopsis application. This is a
daemon that listens on JTST serial port 1. On the PC side you must use
the <B
CLASS="COMMAND"
>jtstflash.exe</B
> (both linux and windows PC are
supported) to flash the image on JTST. The sources for win32 and 
linux/cygwin versions of this host tool can be found in the support
directory of the jtst hal. The binaries can be found along with the
binaries for redboot on the eCos website at 
<A
HREF="http://ecos.sourceware.org/ecos/boards/redbootbins/at91jtst/index.html"
TARGET="_top"
>http://ecos.sourceware.org/ecos/boards/redbootbins/at91jtst/</A
></P
><P
>When the jtstflashd.elf is started, the user should open the jumper
JP5 to write in the second half (512Kbytes) of the flash, in this way
the original RedBoot image is preserved.</P
><DIV
CLASS="SECT3"
><H3
CLASS="SECT3"
><A
NAME="AEN3780"
>GDB console</A
></H3
><TABLE
BORDER="5"
BGCOLOR="#E0E0F0"
WIDTH="70%"
><TR
><TD
><PRE
CLASS="SCREEN"
><KBD
CLASS="USERINPUT"
>arm-elf-gdb jtstflash.elf</KBD
>
(gdb) <KBD
CLASS="USERINPUT"
>set remotebaud 115200</KBD
>
(gdb) <KBD
CLASS="USERINPUT"
>target remote /dev/ttyS0</KBD
>
Remote debugging using /dev/ttyS0
0x00502a44 in ?? ()
(gdb) <KBD
CLASS="USERINPUT"
>load</KBD
>
Loading section .internal_vectors, size 0x1c4 lma 0x160
Loading section .rom_vectors, size 0x40 lma 0x606000
Loading section .text, size 0x14198 lma 0x606040
Loading section .rodata, size 0xb6c lma 0x61a1d8
Loading section .data, size 0x498 lma 0x61ad44
Start address 0x606040, load size 86944
Transfer rate: 77283 bits/sec, 301 bytes/write.
(gdb) <KBD
CLASS="USERINPUT"
>c</KBD
>
Continuing.
* JTST FLASH PROGRAMMER
* opening usart port 1
...</PRE
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CLASS="SECT3"
><H3
CLASS="SECT3"
><A
NAME="AEN3788"
>PC console</A
></H3
><TABLE
BORDER="5"
BGCOLOR="#E0E0F0"
WIDTH="70%"
><TR
><TD
><PRE
CLASS="SCREEN"
><KBD
CLASS="USERINPUT"
>jtstflash mybinaryimage.bin</KBD
>
* binary len 79536 bytes flash add 0x500000..
* flash id check ok
* erasing space address 0x500000... please wait
* flash erase check ok
* start programming 79536 bytes.</PRE
></TD
></TR
></TABLE
></DIV
></DIV
><DIV
CLASS="SECT2"
><H2
CLASS="SECT2"
><A
NAME="AEN3792"
>Special RedBoot Commands</A
></H2
><P
>None.</P
></DIV
><DIV
CLASS="SECT2"
><H2
CLASS="SECT2"
><A
NAME="AEN3795"
>Memory Maps</A
></H2
><P
>This processor has no MMU, so the only memory map is for
physical addresses.</P
><P
>The memory layout of the JTST after bootstrap is as follows:
<TABLE
BORDER="5"
BGCOLOR="#E0E0F0"
WIDTH="70%"
><TR
><TD
><PRE
CLASS="PROGRAMLISTING"
>Physical Address Range     Description
-----------------------    ----------------------------------
0x00000000 - 0x00007fff    On-chip SRAM
0x00500000 - 0x0057ffff    Flash
0x00600000 - 0x0063ffff    External SRAM
0x00410000 - 0x0042fffc    On-chip Magic Data Memory Left
0x00430000 - 0x0043fffc    On-chip Magic Data Memory Right
0x00430000 - 0x0044fffc    On-chip Magic Program Memory
0x00490000 - 0x00490ffc    On-chip Arm/Magic Data Exchange Left
0x004A0000 - 0x004A0ffc    On-chip Arm/Magic Data Exchange Right
0x00450000 - 0x0045003c    Magic I/O registers
0x00460000 - 0x0046000c    Magic Control registers
0xffe00000 - 0xffffffff    I/O registers</PRE
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