control.v

dds编程代码 希望对别人有帮助 其功能是根据dds的原理编写

//工作模式控制模块：control.v
 module  control(clk,keyin,wavemode,length);
    input [3:0]keyin; // 输入键值
    input clk;  //系统时钟 
    output reg[1:0]wavemode; //输出波形模式值
    output reg[23:0] length;  //输出频率控制字
    reg [23:0] fredata;
    integer single_state=1,single_frc=1;
    always@(posedge  clk)
    begin
      case(keyin)
        4'b0001:begin wavemode=2'b01;
                      length=24'd3;end   //键1：复位
        4'b0010:begin case(single_state)  //键2：波形模式选择
                      1:wavemode=2'b01;  //方波
                      2:wavemode=2'b10;  //三角波
                      3:wavemode=2'b11;  //正弦波
                default:begin wavemode=2'b01;
                              single_state=0;end
                      endcase
                      single_state=single_state+1;
                end
        4'b0100:begin case(single_frc)    //键3：频率档位选择
                      1:length=24'd3;        //1Hz~1KHz
                      2:length=24'd3355;     //1KHz~10KHz
                      3:length=24'd33554;    //10KHz~200KHz 
                default:begin length=24'd671088;   //大于200KHz
                              single_frc=0;end  
                      endcase
                      single_frc=single_frc+1;
                end                                
        4'b1000:begin case(single_frc)    //键4：频率步进选择
                      1:length=length+24'd3;        //步进为1Hz
                      2:length=length+24'd336;      //步进为100Hz
                      3:length=length+24'd3355;     //步进为1KHz
                      4:length=length+24'd33554;    //步进为10KHz
                default:length=length+24'd0;   //步进为0  
                      endcase
                end
     endcase
  end
 endmodule