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📄 binary phase shift keying.htm

📁 In this exercise, you will design a BPSK detector to process the BPSK modulated data contained in th
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<HTML><HEAD><TITLE>EX-3: Binary Phase Shift Keying</TITLE>
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<H2>EX-3: Phase Shift Keying</H2>
<TABLE>
  <TBODY>
  <TR>
    <TD><IMG border=0 height=100 
      src="Binary Phase Shift Keying.files/eyeemboss.gif" units="pixels"></TD>
    <TD>In this exercise, you will design a BPSK detector to process the BPSK 
      modulated data contained in the file <TT>bpskdata.mat</TT> 
</TD></TR></TBODY></TABLE>
<HR>

<H2>Specifications</H2>
<TABLE>
  <TBODY>
  <TR>
    <TD vAlign=center><IMG 
      src="Binary Phase Shift Keying.files/bpskconst.gif"> 
    <TD vAlign=center><PRE>	normalized symbol rate:		1/8 bit/sample
	normalzed carrier frequency:	0.25 cycles/sample
        carrier phase:		        0°
	symbol clock offset:	        0 sec
        pulse shape:                    Square Root Raised Cosine(SRRC) (roll-off = 50%, span=12 symbols)
        average energy                  1 Joule
	input file:		        bpskdata.mat
	input message length:	        119 symbols (bits)<PRE></PRE></PRE></TD></TR></TBODY></TABLE>
<P>
<HR>

<H2>Preliminary Design</H2>
<H3>Design the Detector</H3><IMG 
src="Binary Phase Shift Keying.files/bpskmf.gif"> 
<P>
<P>Design the BPSK detector using blocks from the SIMULINK Block Library and the 
Communications Blockset Library. 
<H3>Test the Detector Design</H3>Test your design using the following procedure: 

<OL>
  <LI>Design a modulator (below) to meet the above specifications except make 
  the input the four symbol sequence <TT>1 0 0 1</TT> 
  <P><IMG src="Binary Phase Shift Keying.files/bpskmod.gif"> 
  <P></P>
  <LI>Connect the output of your modulator to the the input of your detector. 
  <P></P>
  <LI>Connect the output of your detector to a <B>To Workspace</B> block. (Be 
  sure to open the Properties Dialog Window and set the Save format to matrix.) 
  <P></P>
  <LI>Set the simulation parameters as follows: <PRE>	Start Time:		0.0
	Stop Time:		(12+4+1)*8
        Solver options          Type: Fixed-step
                                discrete (no continuous states)
        Fixed step size:        1
	</PRE>Note: The stop time is computed as follows: 12 = span of the filter 
  (half the span is the delay at the modulator, half the span is the delay at 
  the detector); 4 = the number of data symbols; 1 = the one bit (or symbol) 
  delay to allow proper phasing of the downsample operation in the detector; 8 = 
  the number of samples/symbol. 
  <P></P>
  <LI>Run the simulation and plot the received signal r[n] and the matched 
  filter output on the same set of axes. 
  <P></P>
  <LI>Adjust the delay on the Downsample block to obtain the correct sybmol 
  timing. 
  <P></P>
  <LI>Does the workspace variable agree with the input sequence (<TT>1 0 0 
  1</TT>)? </LI></OL>
<HR>

<H2>Exercise</H2>
<OL>
  <LI>Replace the modulator blocks with the <B>From File</B> block and set the 
  Filename to: <TT>bpskdata.mat</TT>  
  <P></P>
  <LI>Set the simulation parameters as follows: <PRE>	Start Time:		0.0
	Stop Time:		(12+119+1)*8
        Solver options          Type: Fixed-step
                                discrete (no continuous states)
        Fixed step size:        1
	</PRE>
  <LI>Run the simulation. 
  <P></P>
  <LI>The last 119 bits of the detector output represent seventeen ASCII 
  characters. Determint the message using either your matlab script or the 
  on-line <A>ASCII 
  table</A>. 
  <P></P>
  <LI> Print your answer and the SIMULINK model that contains your detector design. 
  <P></P>
  <P></P><B>
  Note</B>: Please specify the parameters you choose in each block if necessary.
  <P></P>
  <LI>Please finish this exercise on the due data. </LI></OL>
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