📄 hardware.lst
字号:
// initial subroutine. (H/W setting part)
//
// Ex: F_SACM_A2000_Initial:
// ...
// call F_SP_SACM_A2000_Init_ : S480/S240/MS01 is same
// ...
// retf
////////////////////////////////////////////////////////////////////////////////
F_SP_SACM_A2000_Init_:
00008D41 40 92 r1=0x0000; // 24MHz, Fcpu=Fosc
00008D42 19 D3 13 70 [P_SystemClock]=r1 // Frequency 20MHz
00008D44 70 92 r1 = 0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
00008D45 19 D3 0B 70 [P_TimerA_Ctrl] = r1 // Initial Timer A
00008D47 09 93 00 FD r1 = 0xfd00 // 16K
00008D49 19 D3 0A 70 [P_TimerA_Data] = r1
00008D4B 09 93 A8 00 r1 = 0x00A8 // Set the DAC Ctrl
00008D4D 19 D3 2A 70 [P_DAC_Ctrl] = r1
00008D4F 09 93 FF FF r1 = 0xffff
00008D51 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
00008D53 40 92 r1 =0x0000 //
00008D54 11 93 F5 02 r1 = [R_InterruptStatus] //
00008D56 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
//R1 |= C_IRQ4_1KHz
00008D58 19 D3 F5 02 [R_InterruptStatus] = r1 //
00008D5A 19 D3 10 70 [P_INT_Ctrl] = r1 //
00008D5C 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S480_Initial()
// or F_SACM_S480_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S480_Init_:
00008D5D 40 92 r1 = 0x0000 // 24MHz Fosc
00008D5E 19 D3 13 70 [P_SystemClock]=r1 // Initial System Clock
00008D60 70 92 r1=0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
00008D61 19 D3 0B 70 [P_TimerA_Ctrl]=r1 // Initial Timer A
//R1 = 0xfd00 // 16K
00008D63 09 93 ED FC r1 = 0xfced // 15.625K
00008D65 19 D3 0A 70 [P_TimerA_Data]=r1
00008D67 09 93 A8 00 r1 = 0x00A8 //
00008D69 19 D3 2A 70 [P_DAC_Ctrl] = r1 //
00008D6B 09 93 FF FF r1 = 0xffff
00008D6D 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
00008D6F 11 93 F5 02 R1 = [R_InterruptStatus] //
00008D71 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
//R1 |= C_IRQ4_1KHz // Enable 1KHz IRQ4 for S480 decoder
00008D73 19 D3 F5 02 [R_InterruptStatus] = r1 //
00008D75 19 D3 10 70 [P_INT_Ctrl] = r1 //
00008D77 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S240_Initial()
// or F_SACM_S240_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S240_Init_:
00008D78 60 92 r1=0x0020;
00008D79 19 D3 13 70 [P_SystemClock]=r1
00008D7B 09 93 A8 00 r1 = 0x00A8; //
00008D7D 19 D3 2A 70 [P_DAC_Ctrl]= r1
00008D7F 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
00008D80 19 D3 0B 70 [P_TimerA_Ctrl] = r1;
00008D82 09 93 00 FE r1 = 0xfe00; // 24K
00008D84 19 D3 0A 70 [P_TimerA_Data] = r1;
00008D86 09 93 FF FF r1 = 0xffff
00008D88 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
00008D8A 11 93 F5 02 r1 = [R_InterruptStatus] //
00008D8C 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
00008D8E 19 D3 F5 02 [R_InterruptStatus] = r1 //
00008D90 19 D3 10 70 [P_INT_Ctrl] = r1 //
00008D92 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial()
// or F_SACM_MS01_Initial:
//
// Ex: F_SACM_MS01_Initial:
// ...
// call F_SP_SACM_MS01_Init_
// call F_SP_Play_Mode0/1/2/3 ->0,1,2,3 depending on the para1
// ...
// retf
//////////////////////////////////////////////////////////////////
F_SP_SACM_MS01_Init_:
00008D93 40 92 r1 = 0x0000; // 24MHz, Fcpu=Fosc
00008D94 19 D3 13 70 [P_SystemClock] = r1; // Initial System Clock
00008D96 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
00008D97 19 D3 0B 70 [P_TimerA_Ctrl] = r1 // Initial Timer A
//R1 = 0x0003 // 8K
00008D99 40 92 r1 = 0x0000 // Fosc/2
00008D9A 19 D3 0D 70 [P_TimerB_Ctrl] = r1; // Initial Timer B -> 8192
//R1 = 0xFFFF
00008D9C 09 93 00 FA r1 = 0xFA00 // Any time for ADPCM channel 0,1
00008D9E 19 D3 0C 70 [P_TimerB_Data] = r1 // 8K sample rate
00008DA0 09 93 FF FF r1 = 0xffff
00008DA2 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
00008DA4 90 9A RETF
//........................................
F_SP_PlayMode0_: // with F_SP_SACM_MS01_Initial
00008DA5 46 92 r1 = 0x0006
00008DA6 19 D3 2A 70 [P_DAC_Ctrl] = r1
00008DA8 09 93 00 FE r1 = 0xFE00
00008DAA 19 D3 0A 70 [P_TimerA_Data] = r1 //
00008DAC 11 93 F5 02 r1 = [R_InterruptStatus] //
00008DAE 09 A3 10 84 r1 |= C_FIQ_PWM+C_IRQ2_TMB+C_IRQ4_1KHz
00008DB0 19 D3 F5 02 [R_InterruptStatus] = r1 //
00008DB2 19 D3 10 70 [P_INT_Ctrl] = r1 //
00008DB4 90 9A RETF
F_SP_PlayMode1_: // with F_SP_SACM_MS01_Initial
00008DB5 09 93 A8 00 r1 = 0x00A8
00008DB7 19 D3 2A 70 [P_DAC_Ctrl] = r1
00008DB9 09 93 00 FE r1 = 0xFE00
00008DBB 19 D3 0A 70 [P_TimerA_Data] = r1 //
00008DBD 11 93 F5 02 r1 = [R_InterruptStatus] //
00008DBF 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
00008DC1 19 D3 F5 02 [R_InterruptStatus] = r1 //
00008DC3 19 D3 10 70 [P_INT_Ctrl] = r1 //
00008DC5 90 9A RETF
F_SP_PlayMode2_: // with F_SP_SACM_MS01_Initial
00008DC6 09 93 A8 00 r1 = 0x00A8
00008DC8 19 D3 2A 70 [P_DAC_Ctrl] = r1
00008DCA 09 93 9A FD r1 = 0xFD9A
00008DCC 19 D3 0A 70 [P_TimerA_Data] = r1 //
00008DCE 11 93 F5 02 r1 = [R_InterruptStatus] //
00008DD0 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
00008DD2 19 D3 F5 02 [R_InterruptStatus] = r1 //
00008DD4 19 D3 10 70 [P_INT_Ctrl] = r1 //
00008DD6 90 9A RETF
F_SP_PlayMode3_: // with F_SP_SACM_MS01_Initial
00008DD7 09 93 A8 00 r1 = 0x00A8
00008DD9 19 D3 2A 70 [P_DAC_Ctrl] = r1
00008DDB 09 93 00 FD r1 = 0xFD00
00008DDD 19 D3 0A 70 [P_TimerA_Data] = r1 //
00008DDF 11 93 F5 02 r1 = [R_InterruptStatus] //
00008DE1 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
00008DE3 19 D3 F5 02 [R_InterruptStatus] = r1 //
00008DE5 19 D3 10 70 [P_INT_Ctrl] = r1 //
00008DE7 90 9A RETF
///////////////////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial()
// or F_SACM_MS01_Initial:
//
// Ex: F_SACM_DVR_Initial:
// ...
// call F_SP_SACM_DVR_Init_
// call F_SP_Play_Mode0/1/2/3 ->0,1,2,3 depending on the para1
// ...
// retf
// Ex1:
// F_SACM_DVR_Record: (or F_SACM_DVR_InitEncoder)
// ...
// call F_SP_SACM_DVR_Rec_Init
// ...
// retf
// Ex2:
// F_SACM_DVR_Play: (or F_SACM_DVR_InitDecoder)
// ...
// call F_SP_SACM_DVR_Play_Init_
// ...
// retf
///////////////////////////////////////////////////////////////////////////////
F_SP_SACM_DVR_Init_:
00008DE8 40 92 r1 = 0x0000; // 24MHz, Fcpu=Fosc
00008DE9 19 D3 13 70 [P_SystemClock] = r1; // Frequency 20MHz
00008DEB 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
00008DEC 19 D3 0B 70 [P_TimerA_Ctrl] = r1;
00008DEE 09 93 00 FA r1 = 0xfa00; // 8K @ 24.576MHz
//r1 = 0xfb1d; // 8K @ 20MHz
00008DF0 19 D3 0A 70 [P_TimerA_Data] = r1;
00008DF2 75 92 r1 = 0x0035; // ADINI should be open (107)
00008DF3 19 D3 15 70 [P_ADC_Ctrl] = r1;
00008DF5 09 93 A8 00 r1 = 0x00A8; // Set the DA Ctrl
00008DF7 19 D3 2A 70 [P_DAC_Ctrl] = r1;
00008DF9 09 93 FF FF r1 = 0xffff;
00008DFB 19 D3 11 70 [P_INT_Clear] = r1; // Clear interrupt occuiped events
00008DFD 11 93 F5 02 r1 = [R_InterruptStatus] //
00008DFF 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
00008E01 19 D3 F5 02 [R_InterruptStatus] = r1 //
00008E03 19 D3 10 70 [P_INT_Ctrl] = r1 //
00008E05 90 9A RETF
F_SP_SACM_DVR_Rec_Init_: // call by SACM_DVR_Record / SACM_DVR_InitEncoder
00008E06 75 92 r1 = 0x0035; //mic input
//r1 = 0x0037 //line_in input
00008E07 19 D3 15 70 [P_ADC_Ctrl] = r1; //enable ADC
00008E09 09 93 00 FE r1=0xfe00; //24K @ 24.576MHz
00008E0B 19 D3 0A 70 [P_TimerA_Data] = r1
00008E0D 90 9A RETF
F_SP_SACM_DVR_Play_Init_:
00008E0E 40 92 r1 = 0x0000 // call by SACM_DVR_Stop / SACM_DVR_Play
00008E0F 19 D3 15 70 [P_ADC_Ctrl] = r1; // Disable ADC
00008E11 09 93 00 FD r1 = 0xfd00; // 16K @ 24.576MHz
00008E13 19 D3 0A 70 [P_TimerA_Data] = r1;
00008E15 90 9A RETF
///////////////////////////////////////////////////////////////////////////////
// Function: Extra Functions provided by Sunplus
// Type:
// 1. DAC Ramp up/down
// 2. IO config/import/export
// 3. Get resource data
//
//
///////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////
// Function: Ramp Up/Down to avoid speaker "pow" noise
// Destory: R1,R2
////////////////////////////////////////////////////////
_SP_RampUpDAC1: .PROC
F_SP_RampUpDAC1:
00008E16 90 D4 push r1,r2 to [sp]
00008E17 11 93 17 70 r1=[P_DAC1]
00008E19 09 B3 C0 FF r1 &= ~0x003f
00008E1B 09 43 00 80 cmp r1,0x8000
00008E1D 0E 0E jb L_RU_NormalUp
00008E1E 19 5E je L_RU_End
L_RU_DownLoop:
00008E1F 40 F0 82 8E call F_Delay
00008E21 41 94 r2 = 0x0001
00008E22 1A D5 12 70 [P_Watchdog_Clear] = r2
00008E24 09 23 40 00 r1 -= 0x40
00008E26 19 D3 17 70 [P_DAC1] = r1
00008E28 09 43 00 80 cmp r1,0x8000
00008E2A 4C 4E jne L_RU_DownLoop
L_RD_DownEnd:
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -