lpc236x.h

又一个arm上跑的实时内核的源码,gcc 编译

#define rPWM1MR3         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x24))
#define rPWM1CCR         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x28))
#define rPWM1CR0         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x2C))
#define rPWM1CR1         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x30))
#define rPWM1CR2         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x34))
#define rPWM1CR3         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x38))
#define rPWM1EMR         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x3C))
#define rPWM1MR4         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x40))
#define rPWM1MR5         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x44))
#define rPWM1MR6         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x48))
#define rPWM1PCR         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x4C))
#define rPWM1LER         (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x50))
#define rPWM1CTCR        (*(volatile unsigned long *)(PWM1_BASE_ADDR + 0x70))

//-- Universal Asynchronous Receiver Transmitter 0 (UART0) --

#define UART0_BASE_ADDR                0xE000C000

#define rU0RBR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
#define rU0THR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
#define rU0DLL          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x00))
#define rU0DLM          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
#define rU0IER          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x04))
#define rU0IIR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
#define rU0FCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x08))
#define rU0LCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x0C))
#define rU0LSR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x14))
#define rU0SCR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x1C))
#define rU0ACR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x20))
#define rU0ICR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x24))
#define rU0FDR          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x28))
#define rU0TER          (*(volatile unsigned long *)(UART0_BASE_ADDR + 0x30))

//-- Universal Asynchronous Receiver Transmitter 1 (UART1) --

#define UART1_BASE_ADDR                0xE0010000

#define rU1RBR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
#define rU1THR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
#define rU1DLL          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x00))
#define rU1DLM          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
#define rU1IER          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x04))
#define rU1IIR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
#define rU1FCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x08))
#define rU1LCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x0C))
#define rU1MCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x10))
#define rU1LSR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x14))
#define rU1MSR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x18))
#define rU1SCR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x1C))
#define rU1ACR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x20))
#define rU1FDR          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x28))
#define rU1TER          (*(volatile unsigned long *)(UART1_BASE_ADDR + 0x30))

//-- Universal Asynchronous Receiver Transmitter 2 (UART2) --

#define UART2_BASE_ADDR                0xE0078000

#define rU2RBR          (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00))
#define rU2THR          (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00))
#define rU2DLL          (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x00))
#define rU2DLM          (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x04))
#define rU2IER          (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x04))
#define rU2IIR          (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x08))
#define rU2FCR          (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x08))
#define rU2LCR          (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x0C))
#define rU2LSR          (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x14))
#define rU2SCR          (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x1C))
#define rU2ACR          (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x20))
#define rU2ICR          (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x24))
#define rU2FDR          (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x28))
#define rU2TER          (*(volatile unsigned long *)(UART2_BASE_ADDR + 0x30))

//-- Universal Asynchronous Receiver Transmitter 3 (UART3) --

#define UART3_BASE_ADDR                0xE007C000

#define rU3RBR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00))
#define rU3THR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00))
#define rU3DLL          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x00))
#define rU3DLM          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x04))
#define rU3IER          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x04))
#define rU3IIR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x08))
#define rU3FCR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x08))
#define rU3LCR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x0C))
#define rU3LSR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x14))
#define rU3SCR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x1C))
#define rU3ACR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x20))
#define rU3ICR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x24))
#define rU3FDR          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x28))
#define rU3TER          (*(volatile unsigned long *)(UART3_BASE_ADDR + 0x30))

//-- I2C Interface 0 --

#define I2C0_BASE_ADDR                0xE001C000

#define rI20CONSET      (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x00))
#define rI20STAT        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x04))
#define rI20DAT         (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x08))
#define rI20ADR         (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x0C))
#define rI20SCLH        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x10))
#define rI20SCLL        (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x14))
#define rI20CONCLR      (*(volatile unsigned long *)(I2C0_BASE_ADDR + 0x18))

//-- I2C Interface 1 --

#define I2C1_BASE_ADDR                0xE005C000

#define rI21CONSET      (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x00))
#define rI21STAT        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x04))
#define rI21DAT         (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x08))
#define rI21ADR         (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x0C))
#define rI21SCLH        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x10))
#define rI21SCLL        (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x14))
#define rI21CONCLR      (*(volatile unsigned long *)(I2C1_BASE_ADDR + 0x18))

//-- I2C Interface 2 --

#define I2C2_BASE_ADDR                0xE0080000

#define rI22CONSET      (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x00))
#define rI22STAT        (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x04))
#define rI22DAT         (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x08))
#define rI22ADR         (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x0C))
#define rI22SCLH        (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x10))
#define rI22SCLL        (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x14))
#define rI22CONCLR      (*(volatile unsigned long *)(I2C2_BASE_ADDR + 0x18))

//-- SPI0 (Serial Peripheral Interface 0) --

#define SPI0_BASE_ADDR                0xE0020000

#define rS0SPCR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x00))
#define rS0SPSR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x04))
#define rS0SPDR         (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x08))
#define rS0SPCCR        (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x0C))
#define rS0SPINT        (*(volatile unsigned long *)(SPI0_BASE_ADDR + 0x1C))

//-- SSP0 Controller --

#define SSP0_BASE_ADDR                0xE0068000

#define rSSP0CR0        (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x00))
#define rSSP0CR1        (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x04))
#define rSSP0DR         (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x08))
#define rSSP0SR         (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x0C))
#define rSSP0CPSR       (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x10))
#define rSSP0IMSC       (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x14))
#define rSSP0RIS        (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x18))
#define rSSP0MIS        (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x1C))
#define rSSP0ICR        (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x20))
#define rSSP0DMACR      (*(volatile unsigned long *)(SSP0_BASE_ADDR + 0x24))

//-- SSP1 Controller --

#define SSP1_BASE_ADDR                0xE0030000

#define rSSP1CR0        (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x00))
#define rSSP1CR1        (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x04))
#define rSSP1DR         (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x08))
#define rSSP1SR         (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x0C))
#define rSSP1CPSR       (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x10))
#define rSSP1IMSC       (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x14))
#define rSSP1RIS        (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x18))
#define rSSP1MIS        (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x1C))
#define rSSP1ICR        (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x20))
#define rSSP1DMACR      (*(volatile unsigned long *)(SSP1_BASE_ADDR + 0x24))

//-- Real Time Clock --

#define RTC_BASE_ADDR                0xE0024000

#define rRTC_ILR         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x00))
#define rRTC_CTC         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x04))
#define rRTC_CCR         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x08))
#define rRTC_CIIR        (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x0C))
#define rRTC_AMR         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x10))
#define rRTC_CTIME0      (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x14))
#define rRTC_CTIME1      (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x18))
#define rRTC_CTIME2      (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x1C))
#define rRTC_SEC         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x20))
#define rRTC_MIN         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x24))
#define rRTC_HOUR        (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x28))
#define rRTC_DOM         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x2C))
#define rRTC_DOW         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x30))
#define rRTC_DOY         (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x34))
#define rRTC_MONTH       (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x38))
#define rRTC_YEAR        (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x3C))
#define rRTC_CISS        (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x40))
#define rRTC_ALSEC       (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x60))
#define rRTC_ALMIN       (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x64))
#define rRTC_ALHOUR      (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x68))
#define rRTC_ALDOM       (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x6C))
#define rRTC_ALDOW       (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x70))
#define rRTC_ALDOY       (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x74))
#define rRTC_ALMON       (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x78))
#define rRTC_ALYEAR      (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x7C))
#define rRTC_PREINT      (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x80))
#define rRTC_PREFRAC     (*(volatile unsigned long *)(RTC_BASE_ADDR + 0x84))

//-- A/D Converter 0 (AD0) --

#define AD0_BASE_ADDR                0xE0034000

#define rAD0CR          (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x00))
#define rAD0GDR         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x04))
#define rAD0INTEN       (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x0C))
#define rAD0DR0         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x10))
#define rAD0DR1         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x14))
#define rAD0DR2         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x18))
#define rAD0DR3         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x1C))
#define rAD0DR4         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x20))
#define rAD0DR5         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x24))
#define rAD0DR6         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x28))
#define rAD0DR7         (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x2C))
#define rAD0STAT        (*(volatile unsigned long *)(AD0_BASE_ADDR + 0x30))