lpc236x.h

又一个arm上跑的实时内核的源码,gcc 编译

#define rFIO3DIR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x62))
#define rFIO4DIR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x82))

#define rFIO0DIR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x03))
#define rFIO1DIR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x23))
#define rFIO2DIR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x43))
#define rFIO3DIR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x63))
#define rFIO4DIR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x83))

#define rFIO0DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x00))
#define rFIO1DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x20))
#define rFIO2DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x40))
#define rFIO3DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x60))
#define rFIO4DIRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x80))

#define rFIO0DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x02))
#define rFIO1DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x22))
#define rFIO2DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x42))
#define rFIO3DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x62))
#define rFIO4DIRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x82))

#define rFIO0MASK0      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x10))
#define rFIO1MASK0      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x30))
#define rFIO2MASK0      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x50))
#define rFIO3MASK0      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x70))
#define rFIO4MASK0      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x90))

#define rFIO0MASK1      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x11))
#define rFIO1MASK1      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21))
#define rFIO2MASK1      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x51))
#define rFIO3MASK1      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x71))
#define rFIO4MASK1      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x91))

#define rFIO0MASK2      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x12))
#define rFIO1MASK2      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x32))
#define rFIO2MASK2      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x52))
#define rFIO3MASK2      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x72))
#define rFIO4MASK2      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x92))

#define rFIO0MASK3      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x13))
#define rFIO1MASK3      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x33))
#define rFIO2MASK3      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x53))
#define rFIO3MASK3      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x73))
#define rFIO4MASK3      (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x93))

#define rFIO0MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x10))
#define rFIO1MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x30))
#define rFIO2MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x50))
#define rFIO3MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x70))
#define rFIO4MASKL      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x90))

#define rFIO0MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x12))
#define rFIO1MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x32))
#define rFIO2MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x52))
#define rFIO3MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x72))
#define rFIO4MASKU      (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x92))

#define rFIO0PIN0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x14))
#define rFIO1PIN0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x34))
#define rFIO2PIN0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x54))
#define rFIO3PIN0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x74))
#define rFIO4PIN0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x94))

#define rFIO0PIN1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x15))
#define rFIO1PIN1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x25))
#define rFIO2PIN1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x55))
#define rFIO3PIN1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x75))
#define rFIO4PIN1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x95))

#define rFIO0PIN2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x16))
#define rFIO1PIN2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x36))
#define rFIO2PIN2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x56))
#define rFIO3PIN2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x76))
#define rFIO4PIN2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x96))

#define rFIO0PIN3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x17))
#define rFIO1PIN3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x37))
#define rFIO2PIN3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x57))
#define rFIO3PIN3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x77))
#define rFIO4PIN3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x97))

#define rFIO0PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x14))
#define rFIO1PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x34))
#define rFIO2PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x54))
#define rFIO3PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x74))
#define rFIO4PINL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x94))

#define rFIO0PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x16))
#define rFIO1PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x36))
#define rFIO2PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x56))
#define rFIO3PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x76))
#define rFIO4PINU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x96))

#define rFIO0SET0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x18))
#define rFIO1SET0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x38))
#define rFIO2SET0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x58))
#define rFIO3SET0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x78))
#define rFIO4SET0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x98))

#define rFIO0SET1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x19))
#define rFIO1SET1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x29))
#define rFIO2SET1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x59))
#define rFIO3SET1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x79))
#define rFIO4SET1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x99))

#define rFIO0SET2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1A))
#define rFIO1SET2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3A))
#define rFIO2SET2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5A))
#define rFIO3SET2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7A))
#define rFIO4SET2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9A))

#define rFIO0SET3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1B))
#define rFIO1SET3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3B))
#define rFIO2SET3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5B))
#define rFIO3SET3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7B))
#define rFIO4SET3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9B))

#define rFIO0SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x18))
#define rFIO1SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x38))
#define rFIO2SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x58))
#define rFIO3SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x78))
#define rFIO4SETL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x98))

#define rFIO0SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1A))
#define rFIO1SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3A))
#define rFIO2SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5A))
#define rFIO3SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7A))
#define rFIO4SETU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9A))

#define rFIO0CLR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1C))
#define rFIO1CLR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3C))
#define rFIO2CLR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5C))
#define rFIO3CLR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7C))
#define rFIO4CLR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9C))

#define rFIO0CLR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1D))
#define rFIO1CLR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x2D))
#define rFIO2CLR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5D))
#define rFIO3CLR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7D))
#define rFIO4CLR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9D))

#define rFIO0CLR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1E))
#define rFIO1CLR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3E))
#define rFIO2CLR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5E))
#define rFIO3CLR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7E))
#define rFIO4CLR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9E))

#define rFIO0CLR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x1F))
#define rFIO1CLR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x3F))
#define rFIO2CLR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x5F))
#define rFIO3CLR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x7F))
#define rFIO4CLR3       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x9F))

#define rFIO0CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1C))
#define rFIO1CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3C))
#define rFIO2CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5C))
#define rFIO3CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7C))
#define rFIO4CLRL       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9C))

#define rFIO0CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x1E))
#define rFIO1CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x3E))
#define rFIO2CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x5E))
#define rFIO3CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x7E))
#define rFIO4CLRU       (*(volatile unsigned short *)(FIO_BASE_ADDR + 0x9E))


//-- System Control Block(SCB) modules include Memory Accelerator Module,
//-- Phase Locked Loop, VPB divider, Power Control, External Interrupt,
//-- Reset, and Code Security/Debugging

#define SCB_BASE_ADDR        0xE01FC000

//-- Memory Accelerator Module (MAM) --

#define rMAMCR          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x000))
#define rMAMTIM         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x004))
#define rMEMMAP         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x040))

//-- Phase Locked Loop (PLL) --

#define rPLLCON         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x080))
#define rPLLCFG         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x084))
#define rPLLSTAT        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x088))
#define rPLLFEED        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x08C))

//-- Power Control --

#define rPCON           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C0))
#define rPCONP          (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x0C4))

//-- Clock Divider --

#define rCCLKCFG        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x104))
#define rUSBCLKCFG      (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x108))
#define rCLKSRCSEL      (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x10C))
#define rPCLKSEL0       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1A8))
#define rPCLKSEL1       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x1AC))

//-- External Interrupts --

#define rEXTINT         (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x140))
#define rINTWAKE        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x144))
#define rEXTMODE        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x148))
#define rEXTPOLAR       (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x14C))

//-- Reset, reset source identification --

#define rRSIR           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x180))

//-- RSID, code security protection --

#define rCSPR           (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x184))

//-- AHB configuration --

#define rAHBCFG1        (*(volatile unsigned long *)(SCB_BASE_ADDR + 0x188))