lpc236x.h

又一个arm上跑的实时内核的源码,gcc 编译

//----------------------------------------------------------------------------
//   LPC23xx.h:  Header file for NXP LPC23xx/24xx Family Microprocessors
//   The header file is the super set of all hardware definition of the
//   peripherals for the LPC23xx/24xx family microprocessor.
//
//   Copyright(C) 2006, NXP Semiconductor
//   All rights reserved.
//
//   History
//   2005.10.01  ver 1.00    Prelimnary version, first Release
//
//----------------------------------------------------------------------------

#ifndef _LPC236x_H_
#define _LPC236x_H_


//-- Pin Connect Block ---

#define PINSEL_BASE_ADDR        0xE002C000

#define rPINSEL0        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x00))
#define rPINSEL1        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x04))
#define rPINSEL2        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x08))
#define rPINSEL3        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x0C))
#define rPINSEL4        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x10))
#define rPINSEL5        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x14))
#define rPINSEL6        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x18))
#define rPINSEL7        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x1C))
#define rPINSEL8        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x20))
#define rPINSEL9        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x24))
#define rPINSEL10       (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x28))

#define rPINMODE0        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x40))
#define rPINMODE1        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x44))
#define rPINMODE2        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x48))
#define rPINMODE3        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x4C))
#define rPINMODE4        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x50))
#define rPINMODE5        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x54))
#define rPINMODE6        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x58))
#define rPINMODE7        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x5C))
#define rPINMODE8        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x60))
#define rPINMODE9        (*(volatile unsigned long *)(PINSEL_BASE_ADDR + 0x64))

//-- General Purpose Input/Output (GPIO)

#define GPIO_BASE_ADDR                0xE0028000

#define rIOPIN0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x00))
#define rIOSET0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x04))
#define rIODIR0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x08))
#define rIOCLR0         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x0C))
#define rIOPIN1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x10))
#define rIOSET1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x14))
#define rIODIR1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x18))
#define rIOCLR1         (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x1C))



//--- Vectored Interrupt Controller (VIC) ---

#define VIC_BASE_ADDR        0xFFFFF000

#define rVICIRQStatus   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x000))
#define rVICFIQStatus   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x004))
#define rVICRawIntr     (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x008))
#define rVICIntSelect   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x00C))
#define rVICIntEnable   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x010))
#define rVICIntEnClr    (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x014))
#define rVICSoftInt     (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x018))
#define rVICSoftIntClr  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x01C))
#define rVICProtection  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x020))
#define rVICSWPrioMask  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x024))

#define rVICVectAddr0   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x100))
#define rVICVectAddr1   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x104))
#define rVICVectAddr2   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x108))
#define rVICVectAddr3   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x10C))
#define rVICVectAddr4   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x110))
#define rVICVectAddr5   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x114))
#define rVICVectAddr6   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x118))
#define rVICVectAddr7   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x11C))
#define rVICVectAddr8   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x120))
#define rVICVectAddr9   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x124))
#define rVICVectAddr10  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x128))
#define rVICVectAddr11  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x12C))
#define rVICVectAddr12  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x130))
#define rVICVectAddr13  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x134))
#define rVICVectAddr14  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x138))
#define rVICVectAddr15  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x13C))
#define rVICVectAddr16  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x140))
#define rVICVectAddr17  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x144))
#define rVICVectAddr18  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x148))
#define rVICVectAddr19  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x14C))
#define rVICVectAddr20  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x150))
#define rVICVectAddr21  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x154))
#define rVICVectAddr22  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x158))
#define rVICVectAddr23  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x15C))
#define rVICVectAddr24  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x160))
#define rVICVectAddr25  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x164))
#define rVICVectAddr26  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x168))
#define rVICVectAddr27  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x16C))
#define rVICVectAddr28  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x170))
#define rVICVectAddr29  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x174))
#define rVICVectAddr30  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x178))
#define rVICVectAddr31  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x17C))

//--  The name convention below is from previous LPC2000 family MCUs,
//--  in LPC23xx/24xx, these registers are known as "VICVectPriority(x)".

#define rVICVectCntl0   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x200))
#define rVICVectCntl1   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x204))
#define rVICVectCntl2   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x208))
#define rVICVectCntl3   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x20C))
#define rVICVectCntl4   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x210))
#define rVICVectCntl5   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x214))
#define rVICVectCntl6   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x218))
#define rVICVectCntl7   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x21C))
#define rVICVectCntl8   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x220))
#define rVICVectCntl9   (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x224))
#define rVICVectCntl10  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x228))
#define rVICVectCntl11  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x22C))
#define rVICVectCntl12  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x230))
#define rVICVectCntl13  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x234))
#define rVICVectCntl14  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x238))
#define rVICVectCntl15  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x23C))
#define rVICVectCntl16  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x240))
#define rVICVectCntl17  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x244))
#define rVICVectCntl18  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x248))
#define rVICVectCntl19  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x24C))
#define rVICVectCntl20  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x250))
#define rVICVectCntl21  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x254))
#define rVICVectCntl22  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x258))
#define rVICVectCntl23  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x25C))
#define rVICVectCntl24  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x260))
#define rVICVectCntl25  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x264))
#define rVICVectCntl26  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x268))
#define rVICVectCntl27  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x26C))
#define rVICVectCntl28  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x270))
#define rVICVectCntl29  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x274))
#define rVICVectCntl30  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x278))
#define rVICVectCntl31  (*(volatile unsigned long *)(VIC_BASE_ADDR + 0x27C))

#define rVICVectAddr    (*(volatile unsigned long *)(VIC_BASE_ADDR + 0xF00))

//-- GPIO Interrupt Registers

#define rIO0_INT_EN_R    (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x90))
#define rIO0_INT_EN_F    (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x94))
#define rIO0_INT_STAT_R  (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x84))
#define rIO0_INT_STAT_F  (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x88))
#define rIO0_INT_CLR     (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x8C))

#define rIO2_INT_EN_R    (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xB0))
#define rIO2_INT_EN_F    (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xB4))
#define rIO2_INT_STAT_R  (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xA4))
#define rIO2_INT_STAT_F  (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xA8))
#define rIO2_INT_CLR     (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0xAC))

#define rIO_INT_STAT     (*(volatile unsigned long *)(GPIO_BASE_ADDR + 0x80))

#define PARTCFG_BASE_ADDR                0x3FFF8000

#define rPARTCFG        (*(volatile unsigned long *)(PARTCFG_BASE_ADDR + 0x00))

//-- Fast I/O setup --

#define FIO_BASE_ADDR                0x3FFFC000

#define rFIO0DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x00))
#define rFIO0MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x10))
#define rFIO0PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x14))
#define rFIO0SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x18))
#define rFIO0CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x1C))

#define rFIO1DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x20))
#define rFIO1MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x30))
#define rFIO1PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x34))
#define rFIO1SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x38))
#define rFIO1CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x3C))

#define rFIO2DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x40))
#define rFIO2MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x50))
#define rFIO2PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x54))
#define rFIO2SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x58))
#define rFIO2CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x5C))

#define rFIO3DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x60))
#define rFIO3MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x70))
#define rFIO3PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x74))
#define rFIO3SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x78))
#define rFIO3CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x7C))

#define rFIO4DIR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x80))
#define rFIO4MASK       (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x90))
#define rFIO4PIN        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x94))
#define rFIO4SET        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x98))
#define rFIO4CLR        (*(volatile unsigned long *)(FIO_BASE_ADDR + 0x9C))

//-- FIOs can be accessed through WORD, HALF-WORD or BYTE. --

#define rFIO0DIR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x00))
#define rFIO1DIR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x20))
#define rFIO2DIR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x40))
#define rFIO3DIR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x60))
#define rFIO4DIR0       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x80))

#define rFIO0DIR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x01))
#define rFIO1DIR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x21))
#define rFIO2DIR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x41))
#define rFIO3DIR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x61))
#define rFIO4DIR1       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x81))

#define rFIO0DIR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x02))
#define rFIO1DIR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x22))
#define rFIO2DIR2       (*(volatile unsigned char *)(FIO_BASE_ADDR + 0x42))