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// User's interrupt setting have to combine with this register
// while co-work with SACM library.
//
// See. following function for example:
// F_SP_SACM_A2000_Init_:
// F_SP_SACM_S480_Init_:
// F_SP_SACM_S240_Init_:
// F_SP_SACM_MS01_Init_:
// F_SP_SACM_DVR_Init_:
//////////////////////////////////////////////////
000001A4 .IRAM
.PUBLIC R_InterruptStatus
000001A4 00 00 .VAR R_InterruptStatus = 0 //
//////////////////////////////////////////////////
.DEFINE C_RampDelayTime 32
.DEFINE C_QueueSize 144
000001A5 00 00 .VAR R_Queue
000001A6 00 00 00 00 .DW C_QueueSize-1 DUP(0)
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00 00
00000235 00 00 .VAR R_ReadIndex
00000236 00 00 .VAR R_WriteIndex
00008DC9 .CODE
///////////////////////////////////////////
// Function: Initial Queue
// Destory: R1,r2
///////////////////////////////////////////
_SP_InitQueue: .PROC
_SP_InitQueue_A2000:
_SP_InitQueue_S480:
_SP_InitQueue_S240:
_SP_InitQueue_MS01:
_SP_InitQueue_DVR:
F_SP_InitQueue_A2000:
F_SP_InitQueue_S480:
F_SP_InitQueue_S240:
F_SP_InitQueue_MS01:
F_SP_InitQueue_DVR:
F_SP_InitQueue:
00008DC9 09 93 A5 01 r1 = R_Queue
00008DCB 40 94 r2 = 0
L_ClearQueueLoop?:
00008DCC D1 D4 [r1++] = r2
00008DCD 09 43 35 02 cmp r1, R_Queue+C_QueueSize
00008DCF 44 4E jne L_ClearQueueLoop?
00008DD0 40 92 r1 = 0
00008DD1 19 D3 35 02 [R_ReadIndex] = r1
00008DD3 19 D3 36 02 [R_WriteIndex] = r1
00008DD5 90 9A RETF
.ENDP
///////////////////////////////////////////
// Function: Get a data form Queue
// Output: R1: Data
// R2: return value
// Destory: R1,R2
///////////////////////////////////////////
F_SP_ReadQueue_A2000:
F_SP_ReadQueue_S480:
F_SP_ReadQueue_S240:
F_SP_ReadQueue_MS01:
F_SP_ReadQueue_DVR:
F_SP_ReadQueue:
00008DD6 12 95 35 02 r2 = [R_ReadIndex]
00008DD8 12 45 36 02 cmp r2,[R_WriteIndex]
00008DDA 0D 5E je L_RQ_QueueEmpty
00008DDB 0A 05 A5 01 r2 += R_Queue // get queue data address
00008DDD C2 92 r1 = [r2]
00008DDE 12 95 35 02 r2 = [R_ReadIndex]
00008DE0 41 04 r2 += 1
00008DE1 0A 45 90 00 cmp r2, C_QueueSize
00008DE3 01 4E jne L_RQ_NotQueueBottom
00008DE4 40 94 r2 = 0
L_RQ_NotQueueBottom:
00008DE5 1A D5 35 02 [R_ReadIndex] = r2
//r2 = 0x0000 // get queue data
00008DE7 90 9A retf
L_RQ_QueueEmpty:
//r2 = 0x8000 // queue empty
00008DE8 90 9A retf
///////////////////////////////////////////
// Function: Get a data from Queue but do
// not change queue index
// R1: output
// Destory: R1,R2
///////////////////////////////////////////
F_SP_ReadQueue_NIC:
F_SP_ReadQueue_NIC_A2000:
F_SP_ReadQueue_NIC_S480:
F_SP_ReadQueue_NIC_S240:
F_SP_ReadQueue_NIC_MS01:
F_SP_ReadQueue_NIC_DVR:
00008DE9 12 95 35 02 r2 = [R_ReadIndex]
00008DEB 12 45 36 02 cmp r2,[R_WriteIndex]
00008DED 03 5E je L_RQ_QueueEmpty?
00008DEE 0A 05 A5 01 r2 += R_Queue // get queue data index
00008DF0 C2 92 r1 = [r2]
L_RQ_QueueEmpty?:
00008DF1 90 9A RETF
///////////////////////////////////////////
// Function: Put a data to Queue
// R1: Input
// Destory: R1,R2
///////////////////////////////////////////
F_SP_WriteQueue_A2000:
F_SP_WriteQueue_S480:
F_SP_WriteQueue_S240:
F_SP_WriteQueue_MS01:
F_SP_WriteQueue_DVR:
F_SP_WriteQueue:
00008DF2 12 95 36 02 r2 = [R_WriteIndex] // put data to queue
00008DF4 0A 05 A5 01 r2 += R_Queue
00008DF6 C2 D2 [r2] = r1
00008DF7 12 95 36 02 r2 = [R_WriteIndex]
00008DF9 41 04 r2 += 1
00008DFA 0A 45 90 00 cmp r2, C_QueueSize
00008DFC 01 4E jne L_WQ_NotQueueBottom
00008DFD 40 94 r2 = 0
L_WQ_NotQueueBottom:
00008DFE 1A D5 36 02 [R_WriteIndex] = r2
00008E00 90 9A RETF
///////////////////////////////////////////
// Function: Test Queue Status
// o/p: R1
// Destory: R1
///////////////////////////////////////////
F_SP_TestQueue_A2000:
F_SP_TestQueue_S480:
F_SP_TestQueue_S240:
F_SP_TestQueue_MS01:
F_SP_TestQueue_DVR:
F_SP_TestQueue:
//... Test Queue Empty ...
00008E01 11 93 35 02 r1 = [R_ReadIndex]
00008E03 11 43 36 02 cmp r1,[R_WriteIndex]
00008E05 12 5E je L_TQ_QueueEmpty
//... Test Queue Full ...
00008E06 11 93 35 02 r1 = [R_ReadIndex] // For N Queue Full: 1.R=0 and W=N-1 2. R<>0 and W=R-1
00008E08 05 4E jnz L_TQ_JudgeCond2
00008E09 11 93 36 02 r1 = [R_WriteIndex]
00008E0B 09 43 8F 00 cmp r1, C_QueueSize-1 // Cond1
00008E0D 08 5E je L_TQ_QueueFull
L_TQ_JudgeCond2:
00008E0E 11 93 35 02 r1 = [R_ReadIndex]
00008E10 41 22 r1 -=1
00008E11 11 43 36 02 cmp r1,[R_WriteIndex]
00008E13 02 5E je L_TQ_QueueFull
00008E14 40 92 r1 = 0 // not Full, not empty
00008E15 90 9A retf
L_TQ_QueueFull:
00008E16 41 92 r1 = 1 // full
00008E17 90 9A retf
L_TQ_QueueEmpty:
00008E18 42 92 r1 = 2 // empty
00008E19 90 9A retf
///////////////////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_A2000_Initial()
// or F_SACM_A2000_Initial:
// Note: The following functions are the partial code of original
// initial subroutine. (H/W setting part)
//
// Ex: F_SACM_A2000_Initial:
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